31295019601805 - INTERFACING PHOTOVOLTAIC CONVERTERS TO THE...

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INTERFACING PHOTOVOLTAIC CONVERTERS TO THE UTILITY GRID by SUNEETHA PARUPALLI, B.E. A THESIS IN ELECTRICAL ENGINEERING Submitted to the Graduate Faculty of Texas Tech University in Partial Fulfillment of the Requirements for the Degree of MASTER OF SCIENCE IN ELECTRICAL ENGINEERING Approved
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-f^ ACKNOWLEDGEMENTS 200^ t '7 1 would like to thank Dr. Michael Giesselmann for his support and encouragement. His presence has been invaluable to my experience at Texas Tech University. I have learnt a lot from him in both technical and ethical aspects. I would also like to thank my family, for their emotional and financial support and helping me in achieving my goals. 11
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TABLE OF CONTENTS ACKNOWLEDGEMENTS ii ABSTRACT iv LIST OF FIGURES v CHAPTER I. INTRODUCTION 1 II. MULTILEVEL CONVERTERS 9 III. MICROCONTROLLER: THE HARDWARE INTERFACE 18 IV. UTILITY DETECTION 24 V. RESULTS AND OBSERVATIONS 34 VI. CONCLUSIONS 43 REFERENCES 44 APPENDICES A: ASSEMBLY LANGUAGE CODE FOR HC12 MICROPROCESSOR 45 B: COMPONENT RATINGS 70 111
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ABSTRACT The main objective of this project is to develop and intelligent, compact power conditioning module that can be directly interfaced to PV converters and the utility grid. This inverter incorporates smart control electronics that will synchronize to the utility voltage. This involved developing software algorithms to tie all the hardware together and accomplish overall control. Power is successfiilly fed into the utility using both the photovoltaic arrays and power supply IV
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LIST OF FIGURES 1. Typical daily electric load profile for winter and summer 3 2. Comparison of typical daily electric load profile for winter and summer 3 3. Graphic overview of the solar power resources in the USA 4 4. Project Diagram 5 5. Working of Photovoltaic Cell 6 6. Photovoltaic cells, modules, panels, arrays 8 7. Multilevel Inverter 10 8. Output of Multilevel converter 9. Functional Diagram of LMD18200 12 10. Sign.MagnittideofLMD18200 11. Full-Bridge Multi-Level Inverter Concept 13 12. Output of Full-Bridge Multilevel Inverter 14 13. Schematic of PCB Layout for Power Converter 15 14. Layout of Inverter, microcontroller,Utility Dectection Circuit and RS 232 ports. 16 15. HC12Mocule Used for Processor 19 16. 9S12 Processor Module 20 17. Switching Frequency and Sinusoid Used to Generate PWM 21 18. SPWMi Signal Generated Using Sin(t) 22
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19. SMPM2 Signal Generated Using-Sin(t) 23 20. Schematic for Utility Amplitude Detection Circuit 25 21. Output of Utility Amplitude Detection Circuit 25 22. Schematic of Utility Phase Detection Circuit 26 23. Simulated Output of Utility Phase Detection Circuit 27 24. The Pulse Accumulator of the microcontroller 28 25. Timer Input Capture.Output Compare Registers 29 26. Flowchart for the HC12 microprocessor Code 30 27. Flowchart for the code for Phase Locked Loop 31 28. Flowchart for the Code for the Intermpt Service Retum 32 29. Picture of the complete system 33 30. Control and Output signals for one of the LMD 18200 H-bridge inverter units. . 27 31. Multi-level Voltage on the Transformer Primary 35 32. Minimum voltage on the transformer at zero phase 36 33. Maximum Voltage on the transformer secondary at maximum phase
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This note was uploaded on 09/14/2011 for the course ECON 1723 taught by Professor Hany during the Spring '11 term at City University of Hong Kong.

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31295019601805 - INTERFACING PHOTOVOLTAIC CONVERTERS TO THE...

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