FINALw04_ANS

# FINALw04_ANS - 1 McGill University Faculty of Engineering...

This preview shows pages 1–5. Sign up to view the full content.

1 McGill University DIGITAL SYSTEM DESIGN Faculty of Engineering ECSE-323B FINAL EXAMINATION WINTER 2004 (April 2004) STUDENT NAME McGILL I.D. NUMBER Examiner: Prof. J. Clark Associate Examiner: Prof. Tal Arbel Signature: Signature: Co-Examiner: Prof. M. Marin Signature: Date: April 21 , 2004 Time: 2:00 pm INSTRUCTIONS: SEE NEXT PAGE.

This preview has intentionally blurred sections. Sign up to view the full version.

View Full Document
3 Question 1 : CMOS Circuit Technology (10 points) Draw the pull-up and the pull-down networks of a CMOS circuit producing the AND-OR-INVERT function of 4 variables whose Boolean algebraic expression is f (A,B,C,D) = AND-OR-INVERT (A,B,C,D) = NOT[OR[AND(A,B),AND(C,D)]]. Only true variables are available as inputs. Marking scheme : 5 points for the correct pull-up network and 5 points for the correct pull-down network. _________________________________________________________________________________________ ANSWER PULL-UP NETWORK PULL-DOWN NETWORK

This preview has intentionally blurred sections. Sign up to view the full version.

View Full Document
Your Name__________________________________________________________________________________ Question 2 :Boolean Logic Theory (15 points) Draw the circuit producing the function f(A,B,C,D) = Σ m(8,9,10,11,12,13,15) and using ONLY the building block g(x,y,z) = x f8e5 y + x z. Two such blocks are sufficient. (5 points) a) Explain CLEARLY your approach to solve this problem. (5 points) b) Decompose f in terms of g. (5 points) c) Draw the complete minimal circuit. _________________________________________________________________ ANSWER a) We map on a K-map the function f . If f is not a Booean constant (0,1) or one of the input variables or their complement, it must be the output of a building block g. Now we try to express x, y, z as functions of A, B, C, D and determine if these functions are Boolean constants, input variables or their complement. If any of them are not, again, they must be outputs of a bulding block g. We iterate this process until input variables or their complement are found. If g is complete, the process converges. If not, there is no solution. This process is illustrated by the following figure:
This is the end of the preview. Sign up to access the rest of the document.

{[ snackBarMessage ]}

### Page1 / 24

FINALw04_ANS - 1 McGill University Faculty of Engineering...

This preview shows document pages 1 - 5. Sign up to view the full document.

View Full Document
Ask a homework question - tutors are online