FINALf06_ANS

FINALf06_ANS - 1 McGill University Faculty of Engineering...

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1 McGill University DIGITAL SYSTEM DESIGN Faculty of Engineering ECSE-323 FINAL EXAMINATION FALL 2006 (DECEMBER 2006) STUDENT NAME McGILL I.D. NUMBER Examiner: Prof. J. Clark Associate Examiner: Prof. Miguel Marin Signature: Signature: Date: December 8, 2006 Time: 9:00 am INSTRUCTIONS: SEE NEXT PAGE.
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2 McGILL UNIVERSITY Department of Electrical and Computer Engineering ECSE-323 Fall 2006 FINAL EXAM Question Maximum Points Points Attained 1 10 2 15 3 20 4 15 5 15 6 15 7 15 8 15 9 15 10 20 11 15 12 10 Total 180 points Please write down your name: ANSWER KEY Please write your student ID: _________________________________ Instructions/Please read carefully! This is a close book exam. No books or notes are allowed. You may use a standard calculator. All work is to be done on the attached sheets and under no circumstance are booklets or loose sheets to be used. Write your name at the top of every sheet. Read the question carefully. If something appears ambiguous, write down your assumption. The points have been assigned according to the formula that 1 point = 1 exam minute, so please pace yourself accordingly. Your Name_______________________________________________________ Question 1 : CMOS Circuit Technology (10 points)
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3 (3 points) a) Produce a 2 x 1 multiplexer circuit using only TG’s (transmission gates) and inverters. (2 points) b) Produce a 4 x 1 multiplexer circuit using only two 2 x 1 multiplexers. (5 points) c) Produce a 4 x 2 encoder using only 4 x 1 multiplexers and EXOR gates as needed. ANSWER a) b) F D0 D1 C TG TG D0 D1 D2 D3 F B B 2 x 1 MUX 2 x 1 MUX 2 x 1 MUX A c) I3 I2 I1 I0 Z1 Z0 0 0 0 1 0 0 0 0 1 0 0 1 0 1 0 0 1 0 1 0 0 0 1 1
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4 I0 I1 I2 I3 4 x 2 ENCODER BLOCK DIAGRAM Z0 Z1
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Your Name_______________________________________________________ Question 1 : CMOS Circuit Technology (10 points) (Continues) c) Z0 = f8e5 I0 f8e5 I2 ( I3 I1) Z1 = f8e5 I0 f8e5 I1 ( I3 I2) 0 1 2 3 0 1 2 3 0 I3 I1 I2 I0 I2 I0 I1 4 x 1 MUX Z0 Z1 5
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Your Name_______________________________________________________ Question 2 :Boolean Logic Theory (15 points) (5 points) a) Produce the two-level minimal NAND-NAND circuit of the function F(A,B,C,D,E) = A B f8e5 E + A B E + A C D f8e5 E + A C D E + A C E f8e5 D + ACE D (5 points) b) Factor F in such a way that it can be produced with a multilevel circuit using only two 2-input OR gates and two 2-input AND gates. (5 points) c) Draw the multilevel circuit produced in b). ________________________________________________________________________ ANSWER a) AB CD 00 01 11 10 0 0 0 0 1 0 0 1 0 0 1 0 1 1 0 0 1 1 1 0 0 0 1 0 f8e5 E AB CD 00 01 11 10 0 0 0 0 1 0 0 1 0 0 1 0 1 1 0 0 1 1 1 0 0 0 1 1 E F(A,B,C,D,E) min = A B + A C D + A C E b) FA,B,C,D,E) = A(B +(C(D+E)) c) A B C D E F 6
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Your Name_______________________________________________________ Question 3: VHDL (20 points) a) (6 points) Write a complete VHDL description of a combinational circuit that determines the index of the highest ‘one’ bit in a 8-bit binary number X. Use a single conditional signal
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FINALf06_ANS - 1 McGill University Faculty of Engineering...

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