FINALf02 - 1 McGill University Faculty of Engineering...

Info iconThis preview shows pages 1–6. Sign up to view the full content.

View Full Document Right Arrow Icon
1 McGill University DIGITAL SYSTEM DESIGN Faculty of Engineering ECSE-323A FINAL EXAMINATION FALL 2002 (December 2002) STUDENT NAME McGILL I.D. NUMBER Examiner: Prof. J. Clark Co-Examiner: Prof. M. Marin Signature: Signature: Date: December 17, 2002 Time: 2:00 pm INSTRUCTIONS: SEE NEXT PAGE.
Background image of page 1

Info iconThis preview has intentionally blurred sections. Sign up to view the full version.

View Full DocumentRight Arrow Icon
2 McGILL UNIVERSITY Department of Electrical and Computer Engineering ECSE-323A Fall 2002 FINAL EXAM Question Maximum Points Points Attained 1 10 2 15 3 20 4 15 5 15 6 15 7 15 8 15 9 15 10 20 11 15 12 10 Total 180 points Please write down your name: _____________________________________ Please write your student ID: ______________________________________ Instructions/Please read carefully! This is a close book exam. No books or notes are allowed. You may use a standard calculator. All work is to be done on the attached sheets and under no circumstance are booklets or loose sheets to be used. Write your name at the top of every sheet. Read the question carefully. If something appears ambiguous, write down your assumption. The points have been assigned according to the formula that 1 point = 1 exam minute, so please pace yourself accordingly.
Background image of page 2
Your Name_______________________________________________________ Question 1 : CMOS Circuit Technology (10 points) Consider the CMOS circuit shown below. This circuit has four inputs A,B,C,D and one output Z. X indicates an internal connection meaning that the terminals labelled X are connected together (5 points) a) By completing the table shown below, construct the truth table for this circuit taking into account all possible combinations of L and H inputs. A B C D Z L L L L L L L H L L H L L L H H L H L L L H L H L H H L L H H H H L L L H L L H H L H L H L H H H H L L H H L H H H H L H H H H (5 points) b) Give the k-map expression of Z assuming positive-logic. AB CD 00 01 11 10 00 01 11 10 3
Background image of page 3

Info iconThis preview has intentionally blurred sections. Sign up to view the full version.

View Full DocumentRight Arrow Icon
Your Name_______________________________________________________ Question 2 :Boolean Logic Theory (15 points) You are given: one 3-input NAND gate, one 2-input OR gate and one 2-input AND gate. Using only these gates draw the circuit producing the function: T(A,B,C,D) = f8e5 A B + f8e5 B C + B f8e5 D (8 points) a) Describe briefly your approach (7 points) b) Draw the circuit. Hint You may find helpful the k-map of T __________________________________________________________________________________________ 4
Background image of page 4
Your Name_______________________________________________________ Question 3 : VHDL (20 points) (10 points) a) Write a complete VHDL description of a combinational circuit whose output is high when one 4-bit input, A , has more ‘1’ bits than another 4-bit input, B . Do not use process blocks for this description. (10 points) b) Draw the circuit diagram for the circuit described by the following VHDL code :
Background image of page 5

Info iconThis preview has intentionally blurred sections. Sign up to view the full version.

View Full DocumentRight Arrow Icon
Image of page 6
This is the end of the preview. Sign up to access the rest of the document.

This note was uploaded on 09/16/2011 for the course ECSE 361 taught by Professor Franciscodgaliana during the Winter '09 term at McGill.

Page1 / 20

FINALf02 - 1 McGill University Faculty of Engineering...

This preview shows document pages 1 - 6. Sign up to view the full document.

View Full Document Right Arrow Icon
Ask a homework question - tutors are online