lec0 - ELEC 7250 VLSI Testing(Spring 2006 Place and Time...

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Jan. 10, 2006 ELEC7250: Course Organization 1 ELEC 7250 – VLSI Testing (Spring 2006) Place and Time: Broun 235, Tuesday/Thursday, 11:00AM—12:15PM Course Website: http://www.eng.auburn.edu/~vagrawal/COURSE/E7250_06/course.html Catalog data: ELEC 7250. VLSI Testing (3) Lec. 3. Pr., ELEC 6770. Introduction to VLSI testing, test process and automatic test equipment, test economics and product quality, test economics, fault modeling, logic and fault simulation, testability measures, combinational and sequential circuit test generation, memory test, analog test, delay test, IDDQ test, design for testability, built-in self-test, boundary scan, analog test bus, system test and core test. Textbook: Essentials of Electronic Testing for Digital, Memory & Mixed-Signal VLSI Circuits , Michael L. Bushnell and Vishwani D. Agrawal, Boston: Springer, 2006 printing (this version has many corrections over the original (2000) and subsequent printings by Kluwer Academic Publishers.) Other references: Listed in Appendix C of the textbook. Coordinator:
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lec0 - ELEC 7250 VLSI Testing(Spring 2006 Place and Time...

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