assignment - Study synchronization in asynchronously...

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Spring 2010 ELEC 7770 Advanced VLSI Design Assigned April 19, 2010, report due April 30, 2010 Project Assignments: Allani Study process variability on performance and power Kona Use retiming to convert a single-cycle datapath to pipeline Mangilipally Using spice verify Elmore delay formula (examine effect of source rise  time) Qian Study correlation of delay defects to hazards on critical paths Rashid Examine equivalent faults in synthesis and testing Shanmugasundaram
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Unformatted text preview: Study synchronization in asynchronously communicating digital systems Surgnier Characterize inverter and 2-input NAND gates for delay and leakage (below 180nm technologies) Venkataramani Design and evaluate a clock distribution network for s5378 benchmark circuit Venkatasubramanian Study operation of flip flop at sub-threshold region in 90 nm technology Zhao Study correlation of delay defects to hazards on critical paths...
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This note was uploaded on 09/16/2011 for the course ELEC 7770 taught by Professor Agrawal,v during the Spring '08 term at Auburn University.

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