ISA_For_Low_Power - Term paper for Special Topics in EE -...

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Term paper for Special Topics in EE - Designing VLSI for Low-Power and Self-Test, Fall 2004 Instruction Set Architecture Design for Low Power Hillary Grimes III Department of Electrical and Computer Engineering Auburn University ABSTRACT The battery life of portable electronics today makes power and energy consumption important considerations. This paper presents an overview of instruction set architecture design to reduce power consumption. The methods described involve increasing code density by using reduced instruction word lengths. An idea for further increasing code density is also presented. 1. INTRODUCTION Designs today increasingly move toward targeting portable and battery powered systems rather than traditional desktop systems, increasing the importance of low power consideration during the design process. For the increasing portable electronics demand today, low power design techniques not only increase the system’s battery life, but can also decrease system cost by allowing for smaller, light weight packaging, smaller, low cost batteries, and a reduction in managing heat dissipation [2]. In order to lower power consumption, existing low power design techniques sacrifice performance, showing the general tradeoff between performance and power consumption. Low power design may sacrifice too much performance, making it important to consider the designs effect on performance as well as its effect on power consumption [1]. The design of most instruction set architectures today only consider performance, without considering power dissipation, resulting in designs that are generally power hungry. An instruction set architecture (ISA) designed for a portable system should consider lowering power consumption during the design process [5]. The specification of the ISA has a large impact on both hardware and software (compiler) designs, both of which have a large effect on power consumption. When designing an ISA, we define three main characteristics of the ISA: the register organization, the memory organization, and the instruction set [6]. Register organization defines the number of registers and their sizes [6]. The size of the register file in hardware design, and the number of memory accesses in software and compiler design are both determined by an ISA’s register organization. A small to moderate size register file consumes less power per register access, but more memory accesses are required, increasing the power consumed from overall memory accesses. The number of memory accesses is reduced by using a larger register file (register windows), reducing the power consumed by overall memory accesses, but the power required per register access is significantly increased [1]. Memory organization defines the
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ISA_For_Low_Power - Term paper for Special Topics in EE -...

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