Lpd_8_adiabatic - ELEC 5270/6270 Spring 2011 Low-Power Design of Electronic Circuits Adiabatic Logic Adiabatic Vishwani D Agrawal James J Danaher

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Unformatted text preview: ELEC 5270/6270 Spring 2011 Low-Power Design of Electronic Circuits Adiabatic Logic Adiabatic Vishwani D. Agrawal James J. Danaher Professor Dept. of Electrical and Computer Engineering Auburn University, Auburn, AL 36849 [email protected] http://www.eng.auburn.edu/~vagrawal/COURSE/E6270_Spr11/course.html Copyright Agrawal, 2007 Copyright ELEC6270 Spring 11, Lecture 8 1 Examples of Power Saving and Examples Energy Recovery Energy Power Power saving by power transmission at high voltage: voltage: 1000W transmitted at 100V, current I = 10A If resistance of transmission circuit is 1Ω, then power loss then = I2R = 100W Transmit at 1000V, current I = 1A, transmission loss = Transmit 1W 1W Energy recovery from automobile braking: Normal brake converts mechanical energy into heat Instead, the energy can be stored in a flywheel, or Converted to electricity to charge a battery Copyright Agrawal, 2007 Copyright ELEC6270 Spring 11, Lecture 8 2 Reexamine CMOS Gate V2/ Rp Most energy dissipated here i Rp i = Ve–t/RpC/Rp v(t) Power 2 V×i = V2e–2t/RpC/ Rp C V v(t) 3RpC 0 Energy dissipation per transition = Area/2 = C V 2/ 2 Copyright Agrawal, 2007 Copyright v(t) V ELEC6270 Spring 11, Lecture 8 Time, t 3 Charging with Constant Current i = constant v(t) = it/C C Power i2Rp C2V2Rp/T2 0 Time (T) to charge capacitor to voltage V v(T) = V = iT/C, or T = CV/i Current, i = CV/T Copyright Agrawal, 2007 Copyright Time, t it/C V 0 T=CV/i Output voltage, v(t) V(t) Power = i2Rp = C2V2Rp/T2 Energy dissipation = Power × T = (RpC/T) CV2 ELEC6270 Spring 11, Lecture 8 4 Or, Charge in Steps 0→V/2→V i = Ve–t/RpC/2Rp C V2e–2t/RpC/4Rp V2/4Rp 0 Energy = Area = CV2/8 V v(t) Power v(t) v(t) i2Rp V/2 3RpC 6RpC Time, t Total energy = CV2/8 + CV2/8 = CV2/4 Copyright Agrawal, 2007 Copyright ELEC6270 Spring 11, Lecture 8 5 Energy Dissipation of a Step Voltage step = V/N T E = ∫ V2e–2t/RpC/(N2Rp) dt 0 = [CV2/(2N2)] (1 – e–2T/RpC) ≈ CV2/(2N2) for large T ≥ 3RpC Copyright Agrawal, 2007 Copyright ELEC6270 Spring 11, Lecture 8 6 Charge in N Steps Supply voltage 0 → V/N → 2V/N → 3V/N → . . . NV/N Current, i(t) = Ve–t/RpC/NRp Power, i2(t)Rp = V2e–2t/RpC/N2Rp Energy = N CV2/2N2 = CV2/2N → 0 for N → ∞ Delay Copyright Agrawal, 2007 Copyright = N × 3RpC → ∞ for N → ∞ ELEC6270 Spring 11, Lecture 8 7 Reexamine Charging of a Capacitor R t=0 i(t) V v(t) C Charge on capacitor, q(t) = C v (t) Current, i(t) = C dv(t)/dt Copyright Agrawal, 2007 Copyright = dq(t)/dt ELEC6270 Spring 11, Lecture 8 8 i(t) = C dv(t)/dt = [V – v(t)] /R d v( t ) V – v(t) ─── = ───── dt RC dv(t) dt ∫ ───── = ∫ ──── V – v( t ) RC –t ln [V – v(t)] = ── + A RC Initial condition, t = 0, v(t) = 0 → A = ln V –t v(t) = V [1 – exp(───)] RC Copyright Agrawal, 2007 Copyright ELEC6270 Spring 11, Lecture 8 9 v(t) = i(t) Copyright Agrawal, 2007 Copyright = –t V [1 – exp( ── )] RC dv(t) C ─── dt = ELEC6270 Spring 11, Lecture 8 V –t ── exp( ── ) R RC 10 Total Energy Per Charging Total Transition from Power Supply Transition t Etrans = dt = Copyright Agrawal, 2007 Copyright 2 ∞ ∞V ∫ V i(t) dt = ∫ ── exp( ── ) 0 0 R – RC 2 CV ELEC6270 Spring 11, Lecture 8 11 Energy Dissipated per Transition in Energy Resistance Resistance ∞2 R ∫ i (t) dt = 0 2 V∞ –2 t R ── ∫ exp( ── ) dt R2 0 RC = Copyright Agrawal, 2007 Copyright 1 2 ─ CV 2 ELEC6270 Spring 11, Lecture 8 12 Energy Stored in Charged Energy Capacitor ∞ ∞ –t V –t ∫ v(t) i(t) dt = ∫ V [1– exp( ── )] ─ exp( ── ) dt 0 0 RC R RC 1 2 = ─ CV 2 Copyright Agrawal, 2007 Copyright ELEC6270 Spring 11, Lecture 8 13 Slow Charging of a Capacitor R t=0 i(t) V(t) v(t) C Charge on capacitor, q(t) = C v (t) Current, i(t) = C dv(t)/dt Copyright Agrawal, 2007 Copyright = dq(t)/dt ELEC6270 Spring 11, Lecture 8 14 i(t) = C dv(t)/dt = [V(t) – v(t)] /R d v( t ) V(t) – v(t) ─── = ───── dt RC dv(t) dt ∫ ────── = ∫ ──── V(t) – v(t) RC Copyright Agrawal, 2007 Copyright ELEC6270 Spring 11, Lecture 8 15 Effects of Slow Charging Voltage Voltage across R V(t) v(t) t Copyright Agrawal, 2007 Copyright ELEC6270 Spring 11, Lecture 8 16 Constant Current Is Optimum Constant I(t) R t = [0,T] V C Copyright Agrawal, 2007 ELEC6270 Spring 11, Lecture 8 17 Average and Instantaneous Current Current Let T be the time to charge C to voltage V Average current : (1/T) Instantaneous current: I(t) Where Copyright Agrawal, 2007 T ∫ i(t) dt 0 T ∫ I(t) dt = I0 0 = I0 + i(t) = 0 ELEC6270 Spring 11, Lecture 8 18 Energy Dissipation Energy E = = = = = Copyright Agrawal, 2007 T T R ∫ I2(t) dt = R ∫ [I0 + i(t)]2 dt 0 0 T R ∫ [I02 + 2I0i(t) + i2(t)] dt 0 T T RI02T + 2RI0 ∫ i(t) dt + R ∫ i2(t) dt 0 0 T RI02T + 0 + R ∫ i2(t) dt ≥ RI02T 0 RI02T, minimum value, when i(t) = 0, i.e., I(t) = I0 ELEC6270 Spring 11, Lecture 8 19 Minimum Energy Minimum For a constant current I0, Charging time, T = CV/I0 Emin = RCVI0 Copyright Agrawal, 2007 ELEC6270 Spring 11, Lecture 8 20 References C. C. L. Seitz, A. H. Frey, S. Mattisson, S. D. Rabin, D. A. Speck and J. L. A. van de Snepscheut, “Hot-Clock nMOS,” Proc. Chapel Hill Conf. VLSI, 1985, pp. 1-17. Hill W. C. Athas, L. J. Swensson, J. D. Koller, N. W. Tzartzanis and E. Y.-C. Chou, “Low-Power Digital Systems Based on Adiabatic-Switching Principles,” IEEE Trans. VLSI Systems, vol. 2, IEEE vol. no. 4, pp. 398-407, Dec. 1994. no. Copyright Agrawal, 2007 Copyright ELEC6270 Spring 11, Lecture 8 21 A Conventional Dynamic CMOS Conventional Inverter Inverter V CK P E P E P E CK v(t) vin C vin v(t) Copyright Agrawal, 2007 Copyright ELEC6270 Spring 11, Lecture 8 22 Adiabatic Dynamic CMOS Inverter P E P E P E P E V CK 0 v(t) vin Vf + C vin V-Vf v(t) CK 0 A. G. Dickinson and J. S. Denker, “Adiabatic Dynamic Logic,” IEEE J. Solid-State Circuits, vol. 30, pp. 311-315, March 1995. Copyright Agrawal, 2007 Copyright ELEC6270 Spring 11, Lecture 8 23 Cascaded Adiabatic Inverters vin CK1 CK2 CK1’ CK2’ input CK1 precharge evaluate hold CK2 CK1’ CK2’ Copyright Agrawal, 2007 Copyright ELEC6270 Spring 11, Lecture 8 24 Complex ADL Gate AB + C A C Vf < Vth B CK A. G. Dickinson and J. S. Denker, “Adiabatic Dynamic Logic,” IEEE J. Solid-State Circuits, vol. 30, pp. 311-315, March 1995. Copyright Agrawal, 2007 Copyright ELEC6270 Spring 11, Lecture 8 25 Clocks EVAL. HOLD EVAL. HOLD VDD Φ 0 VDD Φ 0 Copyright Agrawal, 2007 Copyright ELEC6270 Spring 11, Lecture 8 26 Quasi-Adiabatic Logic Design Possible Cases: • The circuit output node X is LOW and the pMOS tree is turned ON: X follows Φ as it swings to HIGH (EVALUATE phase) • The circuit node X is LOW and the nMOS tree is ON. X remains LOW and no transition occurs (HOLD phase) • The circuit node X is HIGH and the pMOS tree is ON. X remains HIGH and no transition occurs (HOLD phase) • The circuit node X is HIGH and the nMOS tree is ON. X follows Φ down to LOW. Copyright Agrawal, 2007 Copyright ELEC6270 Spring 11, Lecture 8 27 A Case Study K. Parameswaran, “Low Power Design of a 32-bit Quasi-Adiabatic ARM Based Microprocessor,” Master’s Thesis, Dept. of ECE, Rutgers University, New Brunswick, NJ, 2004. Copyright Agrawal, 2007 Copyright ELEC6270 Spring 11, Lecture 8 28 Quasi-Adiabatic 32-bit ARM Based Quasi-Adiabatic Microprocessor Design Specifications Microprocessor Operating voltage: 2.5 V Operating temperature: 25oC Operating frequency: 10 MHz to 100 MHz Leakage current: 0.5 fAmps Leakage fAmps 18 Load capacitance: 6X10--18 F (15% activity) Transistor Count: Copyright Agrawal, 2007 Copyright ELEC6270 Spring 11, Lecture 8 29 Technology Distribution Microprocessor Microprocessor has a mix of static CMOS and Quasi-adiabatic components CMOS Quasi-Adiabatic Static CMOS Control Units Control • ARM controller unit • Bus control unit ALU • Adder-subtractor unit • Barrel shifter unit • Booth-multiplier unit Copyright Agrawal, 2007 Copyright Pipeline Units • ID unit • IF unit • WB unit • MEM unit ELEC6270 Spring 11, Lecture 8 30 Power Analysis Datapath Component Power Consumption (mW) Frequency 25 MHz Power Consumption (mW) Frequency 100 MHz Quasiadiabatic Static Static CMOS CMOS Power Power Saved Saved Quasiadiabatic Static Static CMOS CMOS Power Power Saved Saved 32-bit Adder 32-bit Subtracter Subtracter 1.01 1.55 44% 1.29 1.62 20% 32-bit Barrel 32-bit Shifter Shifter 0.9 1.681 46% 1.368 1.8 24% 32-bit Booth 32-bit Multiplier Multiplier 3.4 5.8 40% 5.15 6.2 17% Power Consumption (mW) Frequency 25 MHz Quasiadiabatic Power Power Saved Saved 60 mW 60 mW Copyright Agrawal, 2007 Copyright Static Static CMOS CMOS 85 mW 85 mW 40% ELEC6270 Spring 11, Lecture 8 31 Power Analysis (Cont’d.) Copyright Agrawal, 2007 Copyright ELEC6270 Spring 11, Lecture 8 32 Area Analysis Area (mm2) Datapath Component Quasiadiabatic Static CMOS Area Area Increase Increase 32-bit Adder Subtracter 0.05 0.03 66% 32-bit Barrel Shifter 0.25 0.11 120% 32-bit Booth Multiplier 1.2 0.5 140% Chip Area (mm2) Quasiadiabatic ELEC6270 Spring 11, Lecture 8 Area Area Increase Increase 1.55 Copyright Agrawal, 2007 Copyright Static Static CMOS CMOS 1.01 44% 33 Summary In In principle, two types of adiabatic logic designs have been proposed: have Fully-adiabatic Adiabatic charging Charge recovery: charge from a discharging capacitor is Charge used to charge the capacitance from the next stage. used W. C. Athas, L. J. Swensson, J. D. Koller, N. Tzartzanis and W. E. Y.-C. Chou, “Low-Power Digital Systems Based on Adiabatic-Switching Principles,” IEEE Trans. VLSI Systems, IEEE vol. 2, no. 4, pp. 398-407, Dec. 1994. vol. Quasi-adiabatic Adiabatic charging and discharging Y. Ye and K. Roy, “QSERL: Quasi-Static Energy Recovery Y. Logic,” IEEE J. Solid-State Circuits, vol. 36, pp. 239-248, IEEE vol. Feb. 2001. Feb. Copyright Agrawal, 2007 Copyright ELEC6270 Spring 11, Lecture 8 34 ...
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