Writing_Test_Bench

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Unformatted text preview: Click to edit Master subtitle style Spr 2011, Apr 1 5270/6270 Guest Lecture Introduction to writing a Test Bench in HDL Mridula Allani Spr 2011, Apr 1 11 5270/6270 Guest Lecture Spr 2011, Apr 1 5270/6270 Guest Lecture What is A Test Bench? Test Bench is a program that verifies the functional correctness of the hardware design. l The test bench program checks whether the hardware model does what it is supposed to do and is not doing what it is not supposed to do. Spr 2011, Apr 1 22 5270/6270 Guest Lecture Spr 2011, Apr 1 5270/6270 Guest Lecture Main Functions of a Test Generate stimulus for testing the hardware block. l Apply the stimulus. l Compare the generated outputs against the expected outputs. Generating Input Stimuli Design Under Test (DUT) Comparing Generated Outputs and Expected Outputs Spr 2011, Apr 1 33 5270/6270 Guest Lecture Spr 2011, Apr 1 5270/6270 Guest Lecture Generating Stimulus Vectors can be generated within the test bench program or generated elsewhere and supplied to the test bench program as an input file. l Vectors can also be stored in a table within the test bench program. Spr 2011, Apr 1 44 5270/6270 Guest Lecture Spr 2011, Apr 1 5270/6270 Guest Lecture Typical VHDL Test Bench entity test_bench is end; architecture tb_behavior of test_bench is component design_under_test port ( list-of-ports-their-types- and-modes); end component; Local-signal-declarations; begin Generate-stimulus-vectors-using- behavioral-constructs; Apply-to-entity-under-test; DUT: design_under_test port map ( port-associations ); Monitor-output-values-and-compare- with-expected-values; if (no errors) report "Testbench completed!" severity note; else report "Something wrong!" severity error; end if; end tb_behavior; Spr 2011, Apr 1 55 5270/6270 Guest Lecture Spr 2011, Apr 1 5270/6270 Guest Lecture Defining a Vector Table in Example, constant no_of_bits : INTEGER := 4; constant no_of_vectors : INTEGER := 5; type table_type is array (1 to no_of_vectors ) of my_vector (1 to no_of_bits ); constant vector_period: time := 100 ns; constant input_vectors: table_type := ("1001", "1000", "0010", "0000", "0110"); Spr 2011, Apr 1 66 5270/6270 Guest Lecture Spr 2011, Apr 1...
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This note was uploaded on 09/17/2011 for the course ELEC 6970 taught by Professor Staff during the Spring '08 term at Auburn University.

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Writing_Test_Bench - Click to edit Master subtitle style...

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