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Unformatted text preview: 1-1 ..................................................................................................................................................................................... 1-1 ...................................................................................... TMS320C64x@ @ DSP >: 1-1.................................................................................................................................................................. 1-1 ................................................................................................................. DSP @ > > 2-1..................................................................................................................................... MAC > -2-2-1 4-1........................................................................................................ @ 4-1................................................................................................................ >> > -3-2-1 -4-2-1 5-1........................................................................................................................................ @ @ 5-1...................................................................................................................................... 5-1..................................................................................................................... 6-1.......................................................................................... > DSP @ > -7-2-1 > 8-1.................................................................................................................................. SIMD 8-1................................................................................................................... C6x @ > -1-3-1 -2-3-1 >@ -3-3-1 @ -4-3-1 12-1............................................................................................................................... @ @ > >> > -3-1 > 10-1.............................................................................................................. C6x@ 13-1....................................................................................................... @ @ > -8-2-1 -9-2-1 8-1....................................................................................................................................... TI @ -5-2-1 -6-2-1 @ 13-1................................................................................... -2-1 -1-2-1 3-1.................................................................................................................... 9-1........................................................................................... C6x@ -1-1 -5-3-1 @ @ -6-3-1 13-1....................................................................................................................... > > >@ -7-3-1 14-1............................................................................................... C6x @ >> -8-3-1 14-1..............................................................................................C620X,C670X@ @ 14-1.................................................................................. C621x,C671x,C64x@ 16-1..................................................................... TMS320C6000 @ @ > -9-3-1 @ > - 10-3-1 > - 11-3-1 17-1...................................................................................................................... C64x@ 19-1........................................................................... TMS320C6000 @ 23-1............................................................................................... C6416 > > @ > C6416 > 23-1................................................................................................. -12-3-1 > -4-1 -1-4-1 > -2-4-1 25-1............................................................................................... DSP TORNADO-P6416 > > 26-1................................................................................................... TP6416 > -1-5-1 > -5-1 28-1...................................................................................................... TP6416 > @ -2-5-1 29-1....................................................................................................................... SIOX -3-5-1 32-1.................................................................................................................. TP6416 > -4-5-1 33-1...................................................... .................................................... DSP > TP6416 > @ -5-5-1 @ @ >:> 1-2.................................................................................................................................................................. -1-2 2-2....................................................................................................................... @ -2-2 @ -3-2 9-2....................................................................................................................... EDMA @ -4-2 11-2..................................................................................................................................... @ -5-2 3-2......................................................................................................................... 11-2.......................................................................................... DSP > > @ @ -1-5-2 13-2........................................................................................................................Boot Loader -2 -5-2 ............................................................. G.729 > @ : 1-3................................................................................................................................................................... - 1-4 1-3................................................................................................................................................ > -2-4 @ 3-3....................................................................................................................................... -3-4 4-3................................................................................................................................. @ -4-4 5-3............................................................................................................................... > -5-4 6-3................................................................................................................................. -6-4 7-3.................................................................................................................................... LPC @ -7-4 9-3............................................................................................................................................... > 10-3.................................................................................................................... >@ -8-4 LPC @ -9-4 11-3...................................................................................................................... -10-4 12-3.................................................................................................................... CS-ACELP -11-4 15-3.............................................................................................................................................G.729 > - 12-4 16-3........................................................................................................................................... G.729A -13-4 ................................................................................ G.728 @ : > 1-4.................................................................................................................................................................. -1-4 2-4...................................................................................................................................... G.728 > > 2-4............................................................................................................................ LD_CELP > 1-2-4 -2-4 4-4.................................................................................................................................................... -2-2-4 6-4.............................................................................................................................................. -3-2-4 6-4.................................................................................................... -4-2-4 > 10-4................................................................................................................................ -5-2-4 10-4......................................................................................................................................... -6-2-4 11-4............................................................................................................ -7-2-4 11-4................................................................................................ > -8-2-4 13-4...................................................................................................................... > -9-2-4 13-4............................................................................................................................... 14-4................................................................................................................ -10-2-4 @ 15-4........................................................................................................... > -11-2-4 >@ -12- 2-4 16-4............................................................................................................................ -13-2-4 17-4................................................................................................................................................ >-14-2-4 17-4.............................................................................................................................. -15-2-4 17-4............................................................................................................................... 17-4.......................................................................................................................... 18-4.................................................................................. > -16-2-4 > @ -17-2-4 > -18-2-4 18-4....................................................................................................................................... -19-2-4 20-4.................................................................................................................. > 22-4...................................................................................................... >@ @ -20-2-4 27-4................................................................................................................................................ 37-4.................................................................................. G.728 > @ G.168 < -3-4 @ -4-4 > -5-4 @ > : 2-5 .................................................................................................................. Echo_Canceller 2-5.............................................................................................................................. 2-5.................................................................................................................... -1-5 > -1-1-5 Echo-Suppressor -2-1-5 -3-1-5 3-5....................................................................... Echo-Suppressor Echo-Canceller @ 4-5............................................................ > @ Echo-Canceller -4-1-5 @ > 7-5 ...................................................................................................................................... @ 7-5................................................................................................................................................. LMS -1-2-5 -2-5 9-5.............................................................................................................................................. NLMS -2-2-5 10-5..................................................................................................................................... Sign LMS -3-2-5 11-5 ................................................................................ G. 168 > Echo canceller @ -3-5 11-5................................................................................................................................................ NLP -1-3-5 12-5................................................................................................................................................ DTD -2-3-5 17-5 ................................................................. MATLAB > Echo canceller @ 21-5 ........................ TMS320C6416 ccs > > Echo canceller @ 21-5........................................................................................................................ Convolution -4-5 > -5-5 -1-5-5 21-5................................................................................................................................................ LMS -2-5-5 21-5..................................................................................................................................... Sign-LMS -3-5-5 22-5............................................................................. 26-5 ................................................................. DSP > @ Echo canceller -4-5-5 @ > -6-5 .................................................................................................................................... ‫اول‬ TMS320C64x@ DSP @ > TMS320C64x @ > >@ < > > @ > @ > > > > DSP @ > DSP@ @ > > > > @ > . > . . TMS320C10 1982 TI >@ .> > > 24 > .> @ > 16 < <1990 Motorola > > DSP56301 @ > TMS320C541 >@ > > Motorola < @ @> > . . >> DSP @ @ >> @ @ (1-3) @ < > 2 > .> > > .> @ >> . >> 1 1 data path 1 > > @ > DSP @ Harvard > @ < @ ( < > . Harvard > TMS320C6201 >> > > @ > > @> DSP @ > DSP @ > @ > 1990 TI . >> > >> . @ TMS32010 > DSP @ .> > DSP ) > >> Harvard TMS320C64x @ > > > 2 < > > > > 1 > < > > DSP @ > @ > > <( ) .[18] 3 @ > @ @> > @ . @> > @ @>> @ (2-3) > @> DSP @ . > . [19] @ >> > > > (DSP) >@ ( > : @ > DSP ) @ > DSP @ >@ MAC @ @ > ) > 4 > > > > @ > DSP @ @ 5 > DSP @ >. > .> > > > > >@ >. ( >> - > > > 6 > @ > > >> @ > > DSP @ > .> > > > > @ >> . 1 post increment 2 circular 3 interrupt 4 shift 5 execution unit 6 General purpose 2 > TMS320C64x @ >> @ @> > > > > @ > > @ @ < >> @ > > >@ > @ @ @< @ > > > @ > > > > .>> > > >> @ @ > @ > @ > FIR >> .> @ > > > >> >@ > > > >@> @ > 6 . >@ > . [18]> > > @ > @ ALU @ @ >@ DSP @ < > > ( 10@ >@ <8 > @ > 1 parallel 3 cache 4 Loop 5 Register indirect post(pre) increment 6 execution unit 7 fixed point 8 > )@ data path 2 7 floating point 3 > >> > > > @> .> > > > >@ @ > <DSP @ > > @> 5 >> > >> > > > <> >> > <"Bit Reversed" > > < First In-First out> . > .> > >@ @ > > < @ > > > < RAM @ .> > > > @ > < >> > @ > < >> > > 2 >> > < .> . > 3 4 > > >> >. > @ > ) @ . @ ( 1 DSP @ >> DSP @ >. > > <> TMS320C64x @ > @ . .> ( >2 @ >> DSP @ > > @ > ) > @ @ >> @ > . @ 32 24 20 . > > @ > @ >. > > @ >. @ > > DSP @ @ > @ > <( > > @ @ @> >@ > .> @ @ > 6 @ > @ > > . > > : > > word 2 overflow 3 accumulator 4 overhead 5 Direct Memory Access (DMA) 6 > priority 7 instruction set 4 > > @ > > . > > > > >> >> > 7 1 > >> @ >@ .> .> @, >< @ . . " zero-overhead loop " @ 5 > @ @ > < > 3 > > > @ >> > > @ > DSP@ 4 @ >> @ 16 . @> >> > < > @> > @ > @ > DSP @ @ @ >> @@ . @ @ > >) . > 1 > > . DSP @ > >@ > • @ @ • TMS320C64x @ >> > .> > > > .> @ @ @ > @ > > . > >> @ 2 > 1 > > 3 >< < @ @ = @ >. @ > @ >@ @ > > 4 >@ > > @ @ > > > > @ .> > > @ > > > < .> >7 > @ >@ @ >@ 5 >@ .> @ >> > C6000 @ @ @ > @ @ > ( @ ) > >6 > > TI Motorola < Analog Devices <TI Lucent < < VLIW , SuperScaler @ . > @> <@ @ (3-3) > @ . @ > >@ > @ VLIW .[23] > > @ Opcode 2 saturation 3 rounding 4 parallelism 5 operation 6 m ulti-issue 7 m ulti-issue 8 Very Long Instruction Word 5 > @ @ > > > .> 1 > > . [22,21] 8 . > > > . [20]> @ > > > > @ .> .> > > .> > > >> . . >> > > > @ @ @ <@ @ > @ < > > @ >. @ > > > DSP @ > > @ >> DSP @ @ >> TMS320C64x @ > @ >> >@ > @> > ( @ @ DSP @ > ) VLIW@ @ > . . > @ > > @ > 1 SIMD > > > @ > > < > @ > SIMD .> . > @> @ >> @ > .> @ >> @ > SIMD > @> >> . > @ DSP . >. TMS320 > > > .> DSP @ >@ @ > >> > . TI 3 > <2 TI 1982 @ C55x Single Instruction Multiple Data 2 Fixed Point 3 Floating Point 4 Multiprocessor 6 C54x < C5x< C27x <C2x < C1x @ • @ 1 > • > C3x ) > : @ > @ 4 > TMS320C10 (@ @ TI @ > C4x @ TMS320C64x @ Multiprocessor @> @ @ @ > > TMS320C6000 DSP @ C8x @ @ > • > > . > @ C6x C64x C62x @ > <@ >. 1997 . @> > > C @> 1 > C6000 @ > >@ fixed point @ @ 4800 @ > C67x @ floating point > @ > < . .[21] > (4-3) . > @ @ C6x @ @ > @ ( > ) C6x@ @ . 32 (3 ALU >. > > CPU > @) >8 > ) 2@ 8 > < 32 @ > MIPS Function unit 3 Arithmetic Logic Unit 4 > >> C6000 @ <B A > > @ >@ @> :> 2 > <C . 1 @ VLIW 7 <( > <4 @ C6x @ > CPU > TMS320C64x @ > 10 > > > > >@ > > @ .> @ DSP @ > > 1@ = . > 2 @ > > >> = > > . ( @> @> @ > > @> >@ ) @ 32 16 8 > > @ >> > @ @ @ > @ >@ @ 40 > > > . . > 64 32 > > > => 32 > > 32 > @ 3 : > > >@ > EMIF > @ C64x @ > > 4 >> @ @ C6x@ 5 > C6x@ . @ .> > @ .> 6 @ >@ > > > (5-3) > > @ > . :[21] @ @ 7 1 Packing 2 Branch 3 External Memory Interface 4 Data Path 5 internal 6 EMIF 7 fetch 8 > > CPU • TMS320C64x @ @ DSP @ >1 > > > • • >@ • 32 > @ • • … @ B A0 @ A15 < >> @ > >> ( @ > < 40@ > . A @ ) .( 32 > BA 32 C64X@ @ >> @ 8> > C6000 @ 32 >> > > 40 ( >) > > .(> >@ > > > . > >> @ C6x@ >> dispatch 2 function unit 9 > > @ @ >@ >@ . 1 > ) > >@ >> ) @ A1:A0 . @ B0 . 2 >@ B15 (2-1) 2 TMS320C64x @ 2 @ A> 1 .[21] @ >> 1 . > @> > @> >@ >@ > . ( TMS320C6000 > > @ .(B @ 1 @ 2X > A@ read 2 >. cross path 10 @ 1X @> >B> ) >2 @ > DSP @ > )> > @ > @ > TMS320C64x @ >2 > A> @ LD1 . > >> @ 1 @ DSP @ @ 32 > @ @ > C6x@ .> > >> > > DA2 < .> .D >> T1 > . .[19] > >> > @ > > : > C6x @ T1 >> > @ @ T1 > @ > > @ @ DA2 LD2 . DA1 >> @ DA1 C6x @ >@ @ * A0[3], B1 B> >> >> @ T2 B @ >> @ ST1 LD1 > > @ .D1T 2 LDW >@ >> (DA1,DA2) <A@ .> @ LD2 3 . B> > 4 > > @ :[24] (EMIF) >5 >< < > >> C620X,C670X@ > > @ > . ( 32 > 8) > > > >> @ > . @ @ @ > > > > >@ > 256 @ . > > > >> 16 @ > >> . >> C621x,C671x,C64x@ >> . @ . >> > . 1 store 3 data address path 4 internal 5 peripheral 11 @ @ > > load 2 >@ @ > > @ (L1P,L1D) ( A,B @ > ) > > TMS320C64x @ 32 >8 >@ > (L1P) DSP @ > 256 . .> >> (L2) > > . RAM (> > > > >> > (E)DMA @ ) >> > > > > @ > .[24]> . >> (7-3) (6-3) > C6x@ @ > > .[19] C620X,C670X@ @ >> 12 > ( ) TMS320C64x @ C621x,C671x,C64x@ @ > > ( > . @ < > @ > > < @ .> > @ > @ > @ > > . :[24] > ) @ TMS320C6000 DSP @ .> <CPU > <> . > > C64x @ > > >> @> DMA DMA > (7-3) • @> >> < > @ • EDMA 64 @ > < EDMA C64x @ . >. > <> DMA > EDMA @ RAM <@ ( 1MCBSP) @ @ > C2000 C5000 @ > >. : > > < EDMA > .> > >> • @ <> < DMA > T1 E1 @ > > 1 Multi Channel Buffered Serial Port 13 TMS320C64x @ . >> > < > > (A/D)  @ <> > >> @ > >@ > DSP @ @ @ .(D/A) 128 < > 32 24 < 20 < 16 < 12 < 8 @ > > >> µ-law A-law > > > > @ >> 1 < . .> > > @ @ • C6000 @ >. @ > >> > C64x@ : @ @ • Register File Enhancement 64 <C64x > >> >> 32 > > @ > @ C62x > . > VelociTI.2 32 <C62x > . 40 32 <16 @ > <C62x > . Load <C62x > .>> .> > > • .> .D @ @ > A0 < > NOP >@ > > > Advance Instruction Packing NOP > > C62x > > 32 64 8 @ > C67x > > > .> > > .> • Data Path Extension Double ) 64 > > @ (Load & Store) C64x >@ B2< B1< B0< A2<A1 @ C64x > @ .> > .> .D C62x > . > > (Word Cross-path .D > fetch > < > 8 <C62x > C64x > VelociTI.2 . • • @ . 1 Packed Data Processing . 16 > > > 8 >> 4 @ Additional Function Unit Hardware @ .M, .L, .S, .D > @ Interrupt Selector 14 >> . @> @ > @ > C64x > > TMS320C64x @ .> . .S . > > > > 8×8 > 16×16 > .M Double Word Word @ > bi-directional <.D @ .M . > <.L .> .> > .M . @ • > < . >> @ 32 > .S > .L @ > ) > <.D . L .S . D .L @ @ > > C62x > C64x > . > < .> 3 . 2 > . > >> > > C64x @ .> > >@ > >> >< > 1 @ > >@ . > > C64x @ 1 >> Viterbi Co-Processor 3 > 16 > > > Co-Processor 2 > Turbo Co-Processor 15 ( @ > >@ TMS320C6000 @ > (8-3) > <C6416 @ C64x > C62x > 8×8 > > 5 16 ( 8 DEAL <SHFL @ Increased Orthogonality .> > > GMPY4 DSP @ ) 8@ C6416 > > TMS320C64x @ C6416@ > > DSP .( 720 600 <500@ > 5760 4800 <4000 [25]: @ >> • > • > @ . . C62x @ . @ C6414 C6415 @ : > • CPU VLIW • • @ 3 > • @ @ 2 > @ > > 16 < 32 @ > 1 > > > 8 . 1/39 1/67 < 2 ) > > DSP @ • .> 8×8 32 16×16 > > . > 16 . >@ 4 7 > @ .( : 64 32 < 16 < 8 @ > > > > > @ RAM > > 4 6 7 1 64 (L2) (EDMA) ALU Ball Grid Array Phase Lock Loop Instruction Packing Instruction Set 8 • > • • > @> Cache 16 > > • @> > • @> >> (L1D) Function unit 5 • (L1P) MIPS 3 > > 16 > . 2 @> @ > :> 1 • PLL >@ ) 16 .Set-Associative . @> > .Direct Mapped 8 5 > . : • 532 BGA 6 > >@ > 16 64 > .> • 32 > 64 . (×12 ×6 )@> • • > > • > TMS320C64x @ . 32 16 > .32 MHZ DSP @ • HPI > 32 PCI • > • (MCBSP) • 32 • 16 1 IEEE1149.1 > @ > .> >. > > . @ @ > .D > .> > > > @ >> > >. 3 >> cross path 17 >@ 32 > 32 >3 . (.D2 .D1 @ @ CPU (9-3) >. >> JTAG 2 > 2 > .M1 .D1 < .S1 < .L1 @ 32 > 64 .> 1 .> > @ .M2 .D2 < .S2 <.L2 @ > > > • > > @> > > @ >> ) >> @ TMS320C64x @ C6416 > > >3 > @ @ >. @ > > > >. < > .L @ @ > > > . .S > > .D >1 4 16 * 16 < 8 * 8 > 5 32 <16 < 8 > C64x >@ @ > > > . > . .M >@ . 1 non-aligned 2 Word 3 double word 4 conditional 5 branch 18 > ) 64 > > 64 > ( .D > 32 * 16 @ @ 2 >@ >. > >@ DSP @ > TMS320C64x @ @ > .> >> > @ >. <> < > ( @ @ @ . @ >1> ) > >1 256 @ DSP @ > < > 32 >. >> > @ > .[25]> > C6416 > 0 > > .> >> .> <EMIFA > > C6416 .> > @ > >> (2-1) >> > @ 0x8000 0000 hex > EMIFB > @ <0x6000 0000 hex > @> 2 <C/C++ XDS .> .[25] > 1 < Code Composer Studio > > 2 @ @ 3 EVM @ > C6x @ fetch 2 Extended Development System 3 Evaluation Module 19 > (DSP/BIOS) > > @> TMS320C64x @ TMS320C6416 > > 20 (2-1) DSP @ > TMS320C64x @ TORNADO-P6416 DSP > > @ . > @ G.729 .[26] > (11-3) ( TP6416 > @ TP6416> > >> >> > 133 Mbyte/sec > >@ > DSP TORNADO-P6416 > > DSP TP6416 ) > >> daughter-card @ > > • 1 @ > PCI expansion 21 • • • > PCI HPI > 1 > [26]: @ > > ) ( > @ (10-3) TP6416 > > > DSP @ DPRAM TMS320C64x @ DSP @ 1 @ TI • > > @ > • > Code Composer . 4800 MIPS @ . > .> > > . TMS320C6416 @ 600 MHZ > > DSP @ @> > > @ JTAG > . > 3 2 >@ > @> > <@ HPI > @ >> D/A A/D @ @ . > > >> . . > C6416 > 1 @ > TP6416 @ >> @ @ > 6 @ Serial I/O Expansion 3 emulation controller chip dual-port static RAM 5 synchronous burst static RAM 6 synchronous dynamic RAM 4 22 > DPRAM 1Mbyte • SBSRAM 4 Mbyte • 128 Mbyte • 1 Mbyte • SDRAM (3-1) PCI @ > TP6416 > (EPROM/FLASH) watchdog timer 2 5 > > 4 @ >> @ . > XDS @ TI : > > > TP6416 > I/O > @ (PIOX) @ > (ECC) > .PCI (SIOX) > Stand-alone > EPROM > • > .> > > TMS320C64x @ TP6416 > @> @ < @ @ > > PCI < 1 @ < > .( (4-1) > > @ > M_SA_MODE TP6416 > > DSP @ Boot 23 > > < (4-1) @ @ > PCI @ @ DSP .> .>> PCI .> 1 DSP @ > M_SA_MODE )> @ TP6416 > @ Stand alone 1 > > C6416 @ HIF_CONTROL_RG > > > > > (3-1) > TP6416 > DSP @ > @ 2 < HIF_CONTROL_RG TMS320C64x @ .> > @ .> > @ > @ > @ > > > < > JTAG 0000 <@ @ TP6416 > @ @ EMIF @ DSP @ > (NO BOOT)@ > > > EMIF . >> >> C64x @ EMIF. .> >@ SIOX 1 @ .> > > > .> > > 2 > @ daughter card > @ >> I/O >@ @ @ < 32 16 > . 1 2 3 @ < < > <B A ( @ > MCBSP DSP parallel data Parallel I/O Expansion 24 > SIOX @ > TP6416 > >@ <DSP @ > < C SIOX > < PIOX (12-3) < > 3 ) @ > > > .> . <@ TMS320C64x @ TP6416 > > 1 > )2 SW4-1 1 > DSP . > > 2 (13-3) >1 >B A @ . > @ @ Universal Test & Operations Physical Interface for ATM 25 ) (> ( 50@ > ( UTOPIA1 .> > > SIOX . ) SIOX . 1 > SIOX 1 <0 @ (SIO-1) SIOX A/B > > DSP @ > C (14-3) TMS320C64x @ SIOX .> > .> > > .> > 2 JP10 > @ @ > S4 @ S3 S2 . CLKS_2 > JP9 @ (Socket) @ DSP @ > @ TP6416> > > @ DSP > @ > :> 1 Pin Control Register 2 Receive Control Register 3 Transmit Control Register 26 @ ( > 2 ... XCR < RCR <PCR @ > ) > 3 TP6416 @ > <(JP8) 8 > .> >@ ) CLKS_1 CLKS_0 (15-3) > > > . > ( > C > @ DSP @ @ 1 > TP6416 > @. TMS320C64x @ @ ( ... XDS560 JTAG-IN XDS510) TI DSP @ XSD@ (ECC) > . > . @ JTAG > > TP6416 > > > JTAG (16-3) @ @ JTAG-OUT > JTAG .> > ON <SW4-4 TP6416 > ( JTAG > @ > > @ > @ > > @ < . ) SIOX-A > 27 > PCI @ > SW2 @ > @ > Bootmode UTOPIA @ > > :> > ) TP6416 > . > SIOX @ (McBSP-1 TP6416 <JTAG TP6416 < JTAG .> JTAG-IN > > • > . TP6416 > • > @ Code Composer JTAG-IN • > . > • SW4-3 • @ SW4-2 SW4-1 • @ TMS320C64x @ > JTAG Stand-alone > > DSP @ • @ SW4-4 <> Windows98 .> >> (17-3) < ( > . Stand-alone > > Host > > Windows98 > >> > > ) > TP6416 > PCI > @ @ .> @ Code >> @ < 2 .> >. > > >> @ 1 >> TP6416 > > @ < > < DSP Composer <TP6CC.EXE @> > DSP :> > > @ Stand-alone> > > >> > JTAG-IN > > >> @ > : TP6CC.EXE − cr 0 > @ @ > DSP < [27] > .[26]> @ 1 > > @ > (.OUT > TP6CC.EXE @ −? @ > Run ) @ Code Composer XDS510 Reset 2 TP6416 > TP6COFF.EXE − ex − hcr 0 TP 6CC.EXE @ −r − hcsa1 : TP 6CC .EXE @ TP6CC.EXE @ : TP6CC.EXE @ > .> < .OUT 28 > File @ Load > DSP > @ @ > DSP > @ EDMA McBSP @ .> > >. > > > @ @ @ @ > > >> .> ( 29 ) (1-3) > 2 > >> DSP > @ @ DSP > TornadoP6416 > PCI @ . 600MHz - > ISA DSP > < > TMS320C6416 > @ @ > > XDS510 @ > @ .[26] > > > @ > .[27]> JTAG1> < @ >> 3 .> (PCI > > 2 > ) TP6416 > > > .> Code Composer . > E1 >@ > > @> 8KHz @ > @ @ . @ > < > @ 4 > >> DR CLKR FSR DX CLKX FSX ( > 1 Joint Test Action Group (IEEE 1149.1 Standard) 2 Stand- alone 3 Run 4 Trunk 30 ) > < A-law @ > > > .> IC > .> E1 Line > @ MT8960 .> (2-3) <Code Composer > > >> @ @ > zarlink . TP6416 > XDS510 DSP > . > DSP > > > E1 > > > DSP > < < >. > .> > > . >> >> @ @ @ >@ 32 <E1 @ > > @ > .> > > < 32×8×8000=2.048MHz .> > 8KHz >> @> 8 > @ > > - @ 1 . . > > > : > > > > >> > > < > DX0 > @ @ Transmitted > > .[26] (DR0) > C6416 > (DX0) Recived >> @ SIOX (DR0) < < > TP16 > @ @ > TP6416 > > > > > @ >> @ 8KHz . 2.048MHz . . Transmitted > (3-3) ... ... ... DR 00 00 00 2 > @ DX CLK From Digital Trunk FS MCBSP Site Received Memory > . DSP Card > >> (4-3) ( ) received, transmited @ .global _transmited,_received ; Define variable as global .data _transmited: ; Define lable .word 12345678h ; Define word as Data .word 98765432h 1 MCBSP 2 flowchart 31 > >@ DSP > @ @ > .word 11111111h .word 22222222h .word 33333333h .word 1abcdef2h .word 77777777h .word 66666666h .word 55555555h .word 44444444h .word 54321543h .word 12341234h _received: .space 200 > >> > ; reserve space on memory > >( ) @ @ <> >. > (5-3) < .> > ; Interrupt vector table .global _c_int00, _c_ int4, _c_ int5 .sect "vec" reset: mvkl _c_int00,b1 mvkh _c_int00,b1 b b1 nop nop nop nop nop nmi: b nmi nop nop nop nop nop nop nop rsrv2: 1 > Jump 32 < > 1 < > >@ > . > DSP > @ @ > nop nop nop nop nop nop nop nop rsrv3: b rsrv3 nop nop nop nop nop nop nop int4: mvkl _c_int4,b1 mvkh _c_int4,b1 b b1 nop nop nop nop nop int5: mvkl _c_ int5,b1 mvkh _c_ int5,b1 b b1 nop nop nop nop nop ( > @ ) > global > . <> > C init_mcbsp( ) < >> > > > < @ > . > 33 > "_" > > < > > @ regs.h, mcbsp.h, inter.h > < >. @ DSP > >. > (6-3) .> < > @ > > > ... > < @ . > > > > > @ set_interrupt( ) >@ > @ > >. > . .> (DRR > ) void init_mcbsp(void) { /* PCR setup*/ LOAD_FIELD (MCBSP_PCR_ADDR(0), 1, CLKXP, 1); //rising adge LOAD_FIELD (MCBSP_PCR_ADDR(0), 1, FSXP, 1); //active low LOAD_FIELD (MCBSP_PCR_ADDR(0), 0, CLKXM, 1); LOAD_FIELD (MCBSP_PCR_ADDR(0), 0, FSXM, 1); /* XCR setup */ LOAD_FIELD (MCBSP_XCR_ADDR(0), SINGLE_PHASE, XPHASE, 1); LOAD_FIELD (MCBSP_XCR_ADDR(0), WORD_LENGTH_8, XWDLEN1, XWDLEN1_SZ); LOAD_FIELD (MCBSP_XCR_ADDR(0), 0x1F, XFRLEN1, XFRLEN1_SZ); LOAD_FIELD (MCBSP_XCR_ADDR(0), 0, XDATDLY, XDATDLY_SZ); /* PCR setup*/ LOAD_FIELD (MCBSP_PCR_ADDR(0), 1, CLKRP, 1);//rising adge LOAD_FIELD (MCBSP_PCR_ADDR(0), 1, FSRP, 1);//active low LOAD_FIELD (MCBSP_PCR_ADDR(0), 0, CLKRM, 1); LOAD_FIELD (MCBSP_PCR_ADDR(0), 0, FSRM, 1); /* RCR setup */ LOAD_FIELD (MCBSP_RCR_ADDR(0), 0, RPHASE, 1); LOAD_FIELD (MCBSP_RCR_ADDR(0), WORD_LENGTH_8, RWDLEN1, RWDLEN1_SZ); LOAD_FIELD (MCBSP_RCR_ADDR(0), 0x1F, RFRLEN1, RFRLEN1_SZ); LOAD_FIELD (MCBSP_RCR_ADDR(0), 0, RDATDLY, RDATDLY_SZ); /* SPCR setup */ LOAD_FIELD (MCBSP_SPCR_ADDR(0),0x02, XINTM, XINTM_SZ); LOAD_FIELD (MCBSP_SPCR_ADDR(0),0x02, RINTM, RINTM_SZ); return; } > @ () void set_interrupts(void) { intr_init(); 34 > @ <6 (DXR > ) (8-3) > > > . > @ )> @ > > >. > .( (7-3) >6 .[24]> @ DSP > @ @ > INTR_MAP_RESET(); INTR_ENABLE(CPU_INT_NMI); // Enable NMIE INTR_GLOBAL_ENABLE(); // Set GIE in CSR intr_map(CPU_INT5,ISN_RINT0); intr_map(CPU_INT6,ISN_RINT0); intr_map(CPU_INT7,ISN_XINT0); intr_map(CPU_INT4,ISN_XINT0); INTR_ENABLE(4); INTR_ENABLE(5); return; } ( > ) ... *temp_Received=MCBSP_READ(0); // receiver interrupt routine temp_Received++; ... MCBSP_WRITE(0,*temp_Transmitted); // transmitter interrupt routine temp_Transmitted++; ... () > > > > . @ >> @ >> @ <> (cmd) > > @ > cmd ) (9-3) ( >> > .( ) > > .> 000hex @ (10-3) >> .>> .> . > > transmited received MEMORY { VECTORS : o = 0h , l = 200h onchipDM : o = 00000300h , l = 6ffffh 35 @ >> < // interrupts table > > DSP > @ @ > onchipPM : o = 0007ffffh , l = 3ffffh SBSRAM : o = 80000000h , l = 3fffffh DPRAM : o = 90000000h , l = 0fffffh SDRAM : o = 0A0000000h , l = 7ffffffh EEPROM : o = 64000000h , l = 1fffffh } SECTIONS { vec :> VECTORS .data :> onchipDM .bss :> onchipDM .text :> onchipPM .cinit :> onchipDM .stack :> onchipDM .far :> onchipDM .cio :> onchipDM .const :> onchipDM } // mapping interrupts into tables > >> < @ @ > > > > > .> > > > ) > >> @ ( > @ < > > > DMA > @ @ > > > . <set_interrupt( ) .> receive_buffer > > >> > > init_mcbsp( ) .> > .> 5 > > > > 4 < (DRR > ) .> > < > > > > @ > > @ > .> 4> .> . out.test > (11-3) > > >> > 36 8 @ .4×8000=32000 < DSP > Digital Trunk @ @ > MCBSP DRR (Interrupt routine) Buffer fwrite(buffer,out.test,…) DSP Card ( > < > 32000 > ) > > .> > > @ .> > > E1 2 . > fwrite( ) @ < > @ > (12-3) > > >@ ... LOAD_FIELD (MCBSP_RCR_ADDR(0), 0x1F, RFRLEN1, RFRLEN1_SZ); ... /* MCR setup - Receiver */ LOAD_FIELD (MCBSP_MCR_ADDR(0),1, RMCM, 1); LOAD_FIELD (MCBSP_MCR_ADDR(0), 0, RPABLK, RPABLK_SZ); /* ch0-15 */ LOAD_FIELD (MCBSP_MCR_ADDR(0), 0, RPBBLK, RPBBLK_SZ); /* ch16-31 */ /*Enable channel #2*/ SET_REG(MCBSP0_RCER, 0x4); ... > > (13-3) . > .> +128 0 > ( > ) < MATLAB >> > > . 37 4 < @ DSP > 4> > C6416 > ( > @ @ > > linear @> .> > @ 10 @ 8 .[38] 13 > @ <@ A-law A-law @ . > (14-3) 1 > . 8 @> unsigned short alaw2int(unsigned char log){ unsigned char sign, segment; unsigned short temp, quant; temp=log^0xD5; sign=(temp&0x80)>>7; segment=(temp&0x70)>>4; quant=temp&0x0F; quant<<=1; if(!segment) quant+=1; else{ quant+=33; quant<<=segment-1; } if(sign) return (-quant); else return quant; } unsigned char int2alaw(short linear){ char segment; unsigned char i, sign,quant; unsigned short output, absol, temp; temp=absol=abs(linear); sign=(linear >= 0) ? 1:0; for(i=0;i<16;i++){ output=temp&0x8000; if(output)break; temp<<=1; } Sign–intended 38 G.729 > .> > > @ >> @ 16 > C64x < .> 1 > G.711 > > A-law > > > .> int2alaw( ) 8 13 @ ) A-law 16 @ @ alaw2int( ) 16 >> > DSP > @ @ > segment=11-i; if(segment<=0){ segment=0; quant=(absol>>1)&0x0F; } else quant=(absol>>segment)&0x0F; segment<<=4; output=segment+quant; if(absol>4095) output=0x7F; if(sign) return output^=0xD5; else return output^=0x55; } A-law @ > > . ( @ > ) (5-1) > > ( A-law @ > ) > int2alaw() alaw2int() (16-3) A- > 192 Cycles=1.5 MCPS 19 Cycles=0.15 MCPS 16 @ . @ speech-in > < A-law .> Speech.in >> 3> 39 @ ( 3> 8@ >< ) @ (15-3) int2alaw( ) >@ < law DSP > +128 ( A-law> speech.in > .> . < >@ > . > . > ( ) @ G.729 Shift 40 > > @ alaw2int( ) @ g729e _exec( ) (13-3) <+128 -128 > > > alaw2int( ) alaw2int() > (17-3) .> 1 > 4@ >> > alaw2int() >@ (13-3) @ ) -128 > 1 @ DSP > > @ @ > @ @ > > @ . >> (18-3) Input speech Digital Trunk Decoded speech G.729 Encoder Speech Buffer 3200 frames G.729 Decoder DSP Card > G.729 . > > . > G.729 . > > > @ > > 4> < > G.729 > > ) > A-law < @ 4> > ( @ .> > (19-3) .> > < > > > @ < .> ... R_Buffer=(char**)malloc(2*sizeof(char*)); T_Buffer=(char**)malloc(2*sizeof(char*)); R_Buffer[0]=(char*)malloc(80*sizeof(char)); R_Buffer[1]=(char*)malloc(80*sizeof(char)); T_Buffer[0]=(char*)malloc(80*sizeof(char)); T_Buffer[1]=(char*)malloc(80*sizeof(char)); //************************************* hmem=g729e_alloc(); G729e_INIT(hmem); hmemd=g729d_alloc(); G729d_INIT(hmemd); //*************************************** init_mcbsp(); set_interrupts(); printf("START \n"); while(!count1) // count1 will be True in interrupt service routine after 300 frames { if( R_Temp!=R_Check) // R_Check changes in IST after receiving one frame { for(i=0;i<80;i++) //converting into linear and filling buffer { law_speech=(R_Buffer[!R_Check][i]-64)*2; 41 DSP > @ @ linear_speech=alaw2int(law_speech); linear_speech<<=3; *buffer_read_fill=linear_speech; buffer_read_fill++; } R_Temp=R_Check; } } printf(" ENOUGH \n "); fwrite(buffer_write_fill, sizeof(Word16), 24000,f_speech); // writing buffer into file //********************* Doing G.729 Codec frame=0; while(frame++<300) { INTR_GLOBAL_DISABLE(); for(i=0;i<80;i++) { samples[i]=*buffer_read; buffer_read++; } G729e_exec(hmem,samples,serial); G729d_exec(hmemd,serial, synthsamples); for(i=0;i<80;i++) { *buffer_write=synthsamples[i]; buffer_write++; } INTR_GLOBAL_ENABLE(); } //************************* for(i=0;i<80;i++) { linear_speech=*buffer_write_fill; buffer_write_fill++; linear_speech>>=3; law_speech=int2alaw(linear_speech); T_Buffer[0][i]=(law_speech>>1)+64; } for(i=0;i<80;i++) { linear_speech=*buffer_write_fill; buffer_write_fill++; linear_speech>>=3; law_speech=int2alaw(linear_speech); T_Buffer[1][i]=(law_speech>>1)+64; } 42 > DSP > @ @ > INTR_ENABLE(5); INTR_ENABLE(7); //*******************************sending to Trunk while(!count1) { if( R_Temp!=R_Check) { for(i=0;i<80;i++) { linear_speech= *buffer_write_fill; buffer_write_fill++; linear_speech>>=3; law_speech=int2alaw(linear_speech); T_Buffer[!R_Check][i]=(law_speech>>1)+64; } R_Temp=R_Check; } } printf(" FINISHED \n "); ... > @ ( ) >. R- 1 > >@ > T- @ < >. ) . > @ @ .> > > > .> 1 > > @ @ @ )> > <>> Volatile > @ > G.729 @ > > <>> > > > > @ dual – buffer 2 > > @ >> > char 43 > G.729 @ Main) ( ( > > Volatile >@ Buffer[1], T-Buffer[0] > >@ .> @ -o3@ > > > @ >@ Buffer[1], R-Buffer[0] > .(ping-pong > > 2 80 CPU < 10@ > (20-3) . @ > @ > @ . > Volatile DSP > Start @ @ > Porting Buffer_read samples into G729 codec() and writing reconstructed samples Into Buffur_read Initializing Serial port And Setting Interrupt Enable Receiver Enable Transmitter Reading from serial port In interrupt routine Reading from Buffer_read And doing a-law For 4 sec Linearing sample And filling Buffer_read For 4 sec Writing into serial port In interrupt routine Disable Receiver Disable Transmitter Stop > @> ( @ @ > ) >> > > @ . > @ @> @ G.729 . > (21-3) > > > > @ > Input Speech Digital Trunk Reconstructed Speech 80 bits G.729 Encoder 10 msec Speech farmes (80 samples) Tx Memory Rx G.729 Decoder Buffer <> < > > > .[24] ) >> > > > > @> CPU > .> ( > G.729 > DSP Card >@ > > > > @ CPU > @ (E)DMA 44 > > CPU > DSP > 24 < ... < >> > > (22-3) > > <EDMA @ > < >> <DMA > EDMA > @ .> > . > > 13 @ @ @ EDMA < @ > > < > Parameter @ 1 @.> @ 01A0 014Fhex >. EDMA @ . 01A0 0138hex RAM >> .> @ EDMA > > > >> . > [24,39] > > C6000 @ ( @ ) >@ @ > >@ > @ > EDMA > <EDMA > . @ (13 12 ) > @ . 1 Event 45 Parameter RAM @ > (23-3) @ > Ping-Pong > DSP > Ping-Pong > > > @ > > R-Buffer[1] R@ @ > > @ > @ > @ .> > @ < > R-Buffer[1] @ >. > @ (24-3) Interrupt routine Toggle R_Check 1 2 ... 80 10 ms Digital Trunk 1 2 ... Main() {... If(R_check!=R_temp) { Alaw2lin(R_Buffer) G729e_exec() G729D_exec() Lin2alaw(T_Buffer) R_temp=R_check } 80 10 ms 20 ms ... Enable Transmiter for once (E)DMA Copy T_Buffer into DXR ... 80 > @ 46 ( 2 1 10.17 ms 20.17 ms G.729 ) Buffer[0] 80 @ (E)DMA Copy DRR into R_Buffer 0 10 T-check , R-check @ > G.729 @ .( ping–pong > @ . > EDMA > @ CPU > .> @ ) > R-Buffer[0] . ( > EDMA > @ ... ) 0.17 ms @ DSP > > > > . R> . > CPU @ EDMA Buffer[0] R-check < Buffer[0] > (R-Buffer[0]) > @ > > > (T-Buffer[1] ) T-Buffer[0] > (25-3) > >> EDMA > @ < EDMA R–Buffer[1] . @ > CPU >< @ > R-Buffer[1] T-Buffer[0] > G.729 > > <> > > >> > >> . > @ > .>> R-Buffer[0] >. > R- > @ > . > . > > > G.729 main() ... EDMA_init(); init_mcbsp(); set_interrupts(); EDMA_rxStart( ); while(!count1) { if( R_Temp!=R_Check) { for(i=0;i<80;i++) { law_speech=(R_Buffer[!R_Check][i]-64)*2; linear_speech=alaw2int(law_speech); linear_speech<<=3; samples[i]=linear_speech; } //************************************************************* G729e_exec(hmem,samples,serial); G729d_exec(hmemd,serial, synthsamples); //************************************************************ for(i=0;i<80;i++) { linear_speech=synthsamples[i]; //linear_speech= samples[i]; linear_speech>>=3; law_speech=int2alaw(linear_speech); T_Buffer[!R_Check][i]=(law_speech>>1)+64; } if (!First) { 47 DSP > @ @ First=1; INTR_ENABLE(7); } R_Temp=R_Check; } } ... G.729 . >> > > ( >@ (26-3) > > @ @ 48 ) > > ( ) @ @ > DSP > > < > > >> @ G.729 @ > > > 10 > 64 > 64 > <> @ > @ > < . 64 > 10 14.3 > < @ >@ 600MHz > @ G.729 > C6416 > >@ > @ G.729 @ . @ G.729 @ > > @ G.729 @ ping-pong G.729 . > >. >> . . EDMA > . > > @ > > > 64 @ > > @ @ >@ > .> @ @ 8.6MCPS > G.729 . <>> > @ .> > > @ .( (27-3) 1 > > @ > 1 >. @> G.729 < > @ > > 5 @ >. > > .> ) 35 Sub module 49 > > 40 <LP > > DSP > @ ( > 50 ) @ @ > G.729 > @ G.729 > @ > > < @ . > . > @ . @ . @ < > @> > @> < @ > @ > @ > .> > . ( > @ .> > < >> >. @ @ > > @ >@ < > @ @ @ ) .> .> > > > <( @ ITU1 @ > > ) > < > > @ > > @ >@ > > >. @ > @ < > @ (1-3) 2> @ > @ > >> > @ > > @ International Telecommunication Union (CCITT) 51 ) < < . ( @ G.729 > > @ > > > . > ١ > > @ > > . <> > .> . < > > .[1]> @ < .[2]> >٣ > > > < > > > @ > @ > @ > (2-3) . > @ @ . G.7xx@ ( > Waveform Coders SNR Vocoders 4 ITU-T 52 (6-1) ٤ @ < @> 2 >> > > > >> @ . > @ .[3] <> @ . > > @ > <> > @ ٢ @ @ .> > @ ) > > (6-1) G.729 > Year 1972 ITU Std 1984 (1990) 1992 1996 G.728 G.729 G.729A 16 G.711 G.721 (G.726) 1995 8 1995 8 Bit-rate (kbit/s) 64 32 (16,24,32,40) Technique PCM ADPCM Quality (MOS) 4.3 4.1 4.0 3.9 ~ 3.7 0.125 0.625 10 + 5 10 + 5 Delay (ms) 0.125 (frame + look-ahead) @ < @ @ ٣ ٤ @ Pitch > > > > > > ٥ . > > .> >@ > > < @ > > < @ > < > > @ > . @ > < @ . . > @ Pitch .> < > @ Vocal Tracts 3 Unvoiced 4 > Vocal Cords 2 > <1ms > . . 1 > @ > > <> @ @ ١ > @ Pitch @ < 30 + 7.5 30 + 7.5 >@ > > ~ 3.7 > > @ . 5.3 ~ 3.9 @ > @ 6.3 > < > . G.723.1 G.723.1 (6.3) (5.3) >@ ٢ >. > 1995 LD-CELP CS-ACELP CS-ACELP MP-MLQ ACELP > .> <> > >. > @ Voiced Formant Update 53 20ms >@ >< > ٦ < - G.729 > : @ 1 @> > @ @ @> @ : - @ : - @ . Pitch > > > @ . @ @ > (20ms > > @ : > .> ) @ >> > > > > > .[4]> <> >> > @ . > @ @ @ @ .( (3-3) ) @ (LPC2) > Pitch > > .[5]> > > > > H(Z) = 1 A(Z) LPC > Redundancy 2 Linear Predictive Coding 54 < LPC ( ) @ > .>> G.729 > : H (Z ) = > > < @> 1 + a1 Z −1 @ > >G >> G S (Z ) = −p E(Z ) + ... + a p Z e(n) (1-3) . S(n) : > S (n) = Ge(n) − a1 S (n − 1) − Λ − a p S (n − p) @ > @ > p (2-3) >> > .[6] > > ١ <> < @ LPC @ < @ > > > . ٢ < " @ .> LPC > . @ " > <S(n) W(n) > : W ( n) = 0.54 − 0.46 cos W ( n) = 0 160-320 > .>> .[7] > @ > > . . 2πn N , 0 ≤ n ≤ N −1 >@ @ >> @. > 1 2 > @ > > > @ @ > > @ N Kaiser Hamming > .> (3-3) , otherwise . . > > > @ > LPC Stationary Hamming 55 > @ 10-30ms @ < (4-3) < > > @ G.729 > 1 − az −1 < .> 15 = 0.9375 @ 16 S ′( n) > : @ @ @ . a < > <> @> S(n) S ′( n) = S ( n) − 0.9375S ( n − 1) (4-3) > : LPC > < @ ( @ @ S(n) ˆ S (n) = −a1 S (n − 1) − Λ − a p s(n − p) ˆ ∑ [S (n) − S (n)] (5-3) ai @ 2 (6-3) n : >> @ ) .[5]>> > @ @ a1 r (0) + a 2 r (1) + Λ + a p r ( p − 1) = − r (1) a1 r (1) + a 2 r (1) + Λ + a p r ( p − 2) = −r (2) (7-3) Μ a1 r ( p − 1) + a 2 r ( p − 2) + Λ + a p r (0) = −r ( p ) : > r (i ) = r (−i ) = >> > R.a = −r N −i −1 ∑ S (n) S ( n + i ) > (8-3) n=0 . > N . . [5,6] i < r(i) S(n) >R Toeplitz > a = − R −1 .r > 56 > G.729 > @ r(i,j) @ < r(i) @ @ > @ > S(n) :>> R (i,j) r (i, j ) = ∑ S (n + i ) S ( n + j ) (9-3) n .> @> > >> @ >> Durbin > Toeplitz R : E(0) = r (0) i = 1,..., p for Ki = − r(i) + a1(i −1) r(i − 1) + Λ + ai(i−1) r (1) , E(i − 1) (10-3) ai(i ) = K i for i a (ji ) = a (ji −1) + K i ai(−−j1) j = 1,...,i − 1 E(i) = (1 − K i2 )E(i − 1) @ E(i) i i > < a (ji ) , j = 1,Λ , i j : > > a j = a (j p ) , j = 1,Λ , p > K i , i = 1, Λ , p @ E(p) Durbin :[5,6,7] > G G 2 = E ( p) : > 2 2 E ( p ) = (1 − K 12 )(1 − K 2 ) Λ (1 − K p )r (0) > >> > G > . @> > LPC > (11-3) r(0)<E(p) @ G r(0) ( PARtial CORrelation @ ) PARCOR Ki : a K >> . ai > Ki :> K a: a i(i ) = K i i− a (ji ) = a (ji −1) + K i ai(−11) i = 1, Λ , p j = 1, Λ , i − 1 a K: 57 (12-3) G.729 > @ i = p,Λ ,1 (13-3) K i = ai(i ) a (ji −1) = i a (ji ) − ai(i ) ai(−)j 1 − K i2 j = 1, Λ , i − 1 : > > > @ −1 < Ki < 1 @ < +1 @> . ai , i = 1,Λ , p –1 (14-3) Ki > .[5]> @ LPC (-1 , +1) > @ . @ ai 1 X = [x1 , x 2 ,...., x N ] T @ >@ > >> 1 ≤ i ≤ L < Yi = [Y1i , Y2i ,...., YNi ] @ T .> (5-3) >. > > >@ > > V.Q Yi @ . >< >> > @ > V.Q .> 2 2 Vector Quantization Code excited LPC (CELP) 58 > > >> ( ) LPC > > >> .[8]> 1 @ > @ > >@ > L @ > > @ G.729 > > >١ 1985 Schroeder & Atal .[9] > > > < > @ <> CELP > @ >> .> .> > @ . @ > @ >@ < > CELP > @ > @> > > > . @ LPC .> > > . @ > > > @ @ @ < @ > ) > @ >@ > @ . @ < > > @ @ < > (> > CELP .( (6-3) > )[9] < ( . < < 10 > <LP <> @ @ >> > ) 16 < 3 <٢ >> .> @> > < 5 . @ < 40 > > @ 8khz . (7-3) . >> . . <> 40 < reset @ > .[9,10] 1 CELP 2 < Pitch 59 5 >> G.729 > ( @ >> > > .[9] > > @ ) > @ @ >> . .> >> > p W (Z ) = 1 − ∑ ak .Z −k k =1 p 1 − ∑ ak .α .Z k (15-3) −k k =1 > < > @ α p=16 <(LP @ : ) α@ > α = e−2π .100 / f > @ @ @ @ @ < @ @ > . (16-3) @ . @> .> < < s > ١ > ak fs 5 @ @ > .> < <>> .> <> @ CS-ACELP >> > @ 8000Hz @> CS-ACELP . > 10 ms . > > (9-3) (8-3) @ > @ . @> @ . @ @ > pitch @ >> 1 code words 60 < @ 5ms @ .[11-15] > > > G.729 > 61 @ G.729 > G.729 > G.729 > > > decoder >. > ( ) pitch @ > ( > > pre- ( > . ) ) > > > <١ > <processing pitch @ > . 1 @ Linear Prediction 62 @ G.729 > pre-processing > @> @ . @ > (8-3) auto-correlation > .> . < 18 > LP @ >. > > @ > .> > > @ > . @ > @> > . . .> post- 1 > @ > @ >> > @ @ (7-1) > CS-ACELP ( > < >< <> > G.729 @ @ > .[15] > <> @ @ pitch @ LP > > LP > >. >> > > .> > pitch .> @ > > . > .> >. > > .> > @ @ .[14] < > < > LP >@ > @ > LP 5ms > Levinson-Durbin LP @ . > windowing > > high-pass filtering signal scaling ١ > @ >@ ) @ @ < > .> LP Line Spectral Pair 63 > @ 10 ms @ > >> @ > G.729 > low-pass > signal scaling > > @ >> > .> @ @ @ processing @ filtering G.729 > 1996 >> (CS-ACELP1) . G.729 > .[11] < (10 ms) @ <(8 kbit/s) > . > > >> > : > > > @ CELP > > (G.729A) > > @ > .[16] > A @> -> G.729A @ @ > @ G.729 > @ G.729B > G.729 @ @ . floating-point > . @ @ @ G.729A G.729@ @ @ @ : G.729C 6.4 kbit/s > G.729 : G.729D 11.8 kbit/s > G.729 : G.729E G.729 @ : G.729B @> . . G.729 ITU-T : >> > > >> . G.729A @ > > >@ @ (8-1) > > .[17] . 50 > > G.729A <G.729 > G.729 > . G.729A MOS MOS > > G.729 @ .[17] MOS٢ G.729A G.729 1 Conjugate-Structure Algebraic-Code-Excited Linear-Prediction 2 Mean Opinion Score 64 (8-1) > G.729 > > > @ > . G.729 @ < .[15,16] G.729 G.729A > < .> > @ G.729A G.729A > > (9-1) > : 1 LP > >. (9-1) G.729 G.729A G.729 @ Submodule 65 @ > (10-3) ١ G.729 > @ • <Lag_window( ) <Autocorr( ) <Pre_Process( ) <١ LP > @ Az_lsp( ) Levinson( ) . . > LSP LSP @ Qua_lsp() LPC • > • <Residu()<Weight_Az() <Int_lpc() < Int_qlpc() @ <LPC @ > @ Pitch_ol() Syn_filt() . • Convolve() ،Pred_lt_3() ،Enc_lag3() ،Pitch_fr3 () @ @ @ > @ G_pitch()‫و‬ . > • Qua_gain() <Corr_xy2() <ACELP_Codebook() .> > . @ @ > 5 4@ 3 . > > > > @ .> 1 • > > > > Pre process 2 @ > G.729A > .> < 1@ @ :> > Syn_filt() Post-filtering 66 • > . ٢ > G.729 > G.729A > >> 67 @ ( ) @ G.728 @ > G.728 > - @> .> .> .> > > @ .> @ > @ > > - G.728 > < > < > > > @ > > > @ > G.728 C@ CCS > @ > < @ . > 16 kbps @ @ > @> @ @ @ @ > .> >> > @ > @> @ . > > G.728 > 50ms 1988 @ > @ > ITU-T >. > > @ > . .> >> < > @> > @ > (1-4) > .> @ > . > 16kbps @ <1992 CELP @ @> .> . > DSL 69 100ms G.728 @ > > > >> G.728 > ( 16kbps @ ) :(Low delay Code Excited Linear Prediction )LD-CELP > LD-CELP @ > < > > 5> > CELP @ @> > .> > LPC > LD-CELP ( 1-4 ) . LD-CELP . = 0.625ms .> @ > > .> () PCM LD-CELP @ < PCM >> .> @ @ µ-law 1024 A-Law <@> 5 .> @ > @ .> 5> >> @> < @ 70 > > 1024 G.728 > >. > > 10 > > < >> @ @ @> > @ > < . .> > > < .>> < > .> PCM 5 > > 5 @> < > > > 10 > > >> (Postfilter) >> @ > >. > >> >@ > > µ-Law A-Law . : > .> . @ @ > >@< LD-CELP < 71 (1-4 ) (2-4) > > G.728 > ( LD-CELP @ ) : k <> >@ > @ @ >> >-1 125µs . 5 @ .> > . > < 5 > 5 72 -2 > G.728 > . > k@ > . > > >> @ > n > -3 > > > > < >> > > @ > -4 @ >> > .> @ > . < 3 @ > 5 > > ( 20) > > > > .> . > > @ :@> So(k) < µ-Law Su(k) <PCM 2ms > PCM - PCM @> A-Law . : Su(5n+4) < Su(5n+3) < Su(5n+2) < Su(5n+1) < Su(5n) < .> 5 S(n)={Su(5n),...,Su(5n+4)} @ > : > . LPC @> > .> @ @ > > > > > . .> 73 @ (3-4 ) G.728 > ( > @ > @ <Levinson-Durbin < < > @ ) > .> @> > > 11 > . > >> > L @ > N > @ < . LPC > Su(m-N) <...<Su(m-2) <Su(m-1) @ @ 4-4 . .> >. Su(m+L-1) ...<Su(m+1) <Su(m) @ >@ > > @ > >> .>> < m > Su(m-N-1) > 74 > G.728 > ( ) > f m ( k ) = bα −[ k −( m − N −1)] Wm (k ) = g m ( k ) = − Sin[c(k − m)] 0 @ <m Wm(k) k ≤ m − N −1 m − N ≤ k ≤ m −1 k≥m : S m ( k ) = S u ( k )Wm ( k ) i=0,1,2,…,M @ Rm(i) > <M M+1 > m −1 Rm (i ) = ∑ > >@ m −1 ∑ S m ( k ) S m ( k − i ) = rm (i ) + k = −∞ @ LPC . i .> S m (k ) S m (k − i ) k = m− N > rm (i ) = m − N −1 ∑ S m (k ) S m (k − i) = k = −∞ > @ > . >> S u (k ) S u ( k − i ) f m ( k ) f m ( k − i ) rm(i). Rm(i) > > < ∑ k = −∞ .> > m − N −1 >@ .> L > .>> rm(i) rm(i) @ S u ( k ) f m ( k )α L S m + L (k ) = S u ( k )Wm + L ( k ) = − S u ( k ) Sin[c( k − m − L)] 0 .> > 75 @ Su(m+L) >@ k ≤ m + L − N −1 m + L − N ≤ k ≤ m + L −1 k ≥m+L i R (m)+ L .> G.728 > rm + L (i ) = m + L − N −1 ∑ S m + L (k ) S m + L ( k − i ) ∑ S m+ L ( k )S m+ L ( k − i) + ∑ S u ( k ) f m ( k )α L S u ( k − i) f m ( k − i)α L + k = −∞ m− N −1 = m+ L− N −1 k =−∞ m− N −1 = @ ∑ S m+ L ( k )S m+ L ( k − i) k = m− N m + L − N −1 ∑ k =−∞ S m+ L ( k )S m+ L ( k − i) k = m− N = α 2 L rm (i ) + m + L − N −1 ∑ S m + L ( k ) S m + L (k − i ) k =m− N rm(i) @ .> R m+ L ( i) rm+L(i) > .> > m + L −1 Rm + L (i ) = rm + L (i ) + ∑ S m+ L (k ) S m+ L (k − i ) k =m+ L− N <(4-4 ) > @ 1 / 40 1 M = 10, L = 20, N = 30α = 2 . > )@White Noise Correction) @ < 11 .> > R(o) @ .> 257 R ( o) ← R ( o) 256 > > >> .> < Levinson-.Durbin j<a i > (i) j @ > @ @ > > Levinson-Durbin. > . .> > Levinson-.Durbin E(o) = R(o) i −1 R(i ) + ∑ a (ji −1) R(i − j ) ki = − a (i ) i j =1 E (i − 1) = ki i a (ji ) = a (ji −1) + k i a (i −−j1) 1≤ j ≤ i −1 E(i) = (1 − k 2 ) E( i − 1) i i=1,2,...,10 @ > < q i = a (i 10) 1 ≤ i ≤ 10 76 G.728 > @ .> . i = NUM i = q i γ 1 = q i (0.6) i > i = DENUM i = q i γ 2 = q i (0.9) i > : . > @ > LD-CELP > .> @ > @ 10 1 + ∑ NUM i z − i W( z) = i =1 10 1 + ∑ DENUM i z − i i =1 > @ <@> < >. <10 > 4@ > > . ( @ > DENUMi < < V(n) < .> @ 2 >> >. > @ > >) @ >> < @ <S(n) > > @ > ITU-T @ > γ2 γ1 > > . NUMi . W(z)=1 > : >> > > <22 9 @ <23 > 50 < >< < >> (2-4) > > . 50 LPC > @ @ < @ . F( z) = 1 1 − P(z) . < r(n) < @> <V(n) < 6 5> > @ > >> r(n) >. > > @> @ .> > > 9 7 @> > . r(n) @ 77 .> > >@ < . > 5 . 10 9 @ > P(z) @> . >> 50 @> > 10 9 @ G.728 > @ : @ @> >> v(n) > .>> @> r(n) > @> > > @ > @ : > ( ) @ >@ . 5-4 9 22 >. @ > > @ @> . > @ > < > > Levinson- Durbin 50 .> > . , @ . 3 α= 4 Levinson-.Durbin 50 50 @ > > @ @ <@> -1 <Levinson-Durbin -2 1/ 40 . >> Hybridwind.49 @ @ @ < 10 >> . N=35 <49 >. > > < @ < @ @ >> @ LPC .> i 253 ˆ ˆ a i = λ ai = ai i = 1.2,...,50 256 i 78 -3 > @ 51 G.728 > > @ < @ 50 P(z) = − ∑ a i z − i i =1 > @ > F( z) = 12 9 22 @ @ 1 = 1 − P(z) > .> >> . > > @ 1 50 1 + ∑ a i z −i i =1 . : > > @> e(n-2) e(n-1) @ > > .> < e(n) < @ > > e(n) > 6-4 > <20 < @ < > . . <σ(n) < > > > ... : >> . < > 1024 @> > > .> @ 18 > > 1024 79 12 @ > < @> > @ . @ G.728 > 7@ > @ > 128 @ > . > >@ 2 8 (Shape code book) @ (Gain code book) >> 3 > > >> > . >. : . .> <δ(n) < > 1024 < @ .> > j < γj > H(z)=F(z)W(z) > > .> >> @ >> H(z) @ @ > δ(n) < > {h(n)} > i <gi < > xij = H δ (n) g i y j > > 0 0 0 0 h(0) h(1) h(0) 0 0 0 0 0 H = h(2) h(1) h(0) 0 h(3) h(2) h(1) h(0) h(4) h(3) h(2) h(1) h(0) . < @ @ ji >. ˆ D =|| x(n) − ~ij ||= σ 2 (n) || x(n) − g i H y i || 2 x . > > . ˆ x ( n) = > x ( n) σ ( n) ˆ ˆ D = σ 2 (n)[|| x(n) || 2 −2 g i x T (n) H y j + g i2 || H y i || 2 ] > > D> > δ 2 ( n) . ˆ || x(n) || 2 > ˆ = −2 g i p T (n) y i + g i2 E j D > T ˆ P ( n ) = H x ( n) E j =|| Hy j ||2 . yj > ˆ < x( n) < > @ Ej > . j@ > > > Ej . Ej . .> > 80 G.728 > @ b i = 2g i ci = g2 i . gi > ˆ D > ˆ D = −bi pi + ci E j > > Pj = p T (n) yi ˆ D Pj = p T (n) y j > < @ . ci < j > bi < Ej > > < Pj = p T (n) y j . > . j,i i . > 10 : > > > < > .> 21 > < .>> @ > @ . @> 7 5 >> @ <> < e(n) < @ > e(n) 4 @ .> >> > >< @ < 10 > < > < < e(n) < > > > @ > < @ > <> e(n) > > > > > > 5 . < Sq(n) < Sq(n) < > > @ @ .> >> > > <19 < δ(n) < > . .> 5 .> 70 > > Sq(n) > > <> > > @ > @ .> @ > > @ > @ > @ > > >> .> < > > > < 23 19 @ . <9 @ 22 @ < @> y( n) = g i min y jmin > > > > @ @ > > 81 > @> @ > @> . G.728 > < Sq(n) < @ > .> 9 @ > <9 @ < @ . 5< > Sq(n) . < > > @ . > < > > 22 @ .> @ @ 50 > >> @ > > > > > > : > > > >@ > .> > @ > > > > > > @ .> . @ > > <16kbps > 16kbps > <@ ( ) > @ > > @ .> > N @ @ .>> > .> >N 6 N@ . .> > > > > @ > > > @ @> >N > N : .> > >. > > 7-4 : ( ) . . 82 > G.728 > @ : y(n) . , σ(n), : . sd(n) . Sq(n) . Sq(n) Sd(n) . : . : . . . . . 83 G.728 > @ pitch . ) (pitch . pitch ( ) pitch p pitch . pitch pitch H L ( z) = g L (1 + b z − p ) . p b gL . FIR IIR IIR tilt . . FIR . LPC kL @ kL .> ~ a i ~ ai . (5-4) > i=1,2,...,10 ~i a > LPC > > > kL > 50 > < 50 @ > LPC Levinson Durbin.50 .> > IIR > 50 11 84 > Levinson-Durbin50 > G.728 > @ 10 H s ( z) = 1 − ∑ b i z −i i =1 10 [1 + µz −1 ] 1 − ∑ a i z −i i =1 b i = ~i ( 0.65) i a i = 1,2,...,10 a i = ~i ( 0.75) i a i = 1,2,...,10 µ = ( 015) k L . <> > > > > µ > . b i < ~i a ~ a . i . . 74 . . @ 75 <Sd(n) < .> < Sf(n) <> . > > <73 - >@ > > @ 74 > 73 > 76 0.01 1 − 0.99 z −1 . . Sf(n) Sf(n) . ITU-T . : pithc . kL . 85 G.728 > 86 @ G.728 > 43 @ . > 47 . 6-4 98 > 99 > 42 > > 6-4 > > < 48 > 97 . 6-4 > 28 . > @ > -32 @ @ 46 0@ > 60 < 32dB .> > : >. > > @ . .> @ > @ <e(n) @ @> @ > @ DSP > -1 10Log|gi| 10Log10P[yi] @ >> > DSP > @> @> > >> > . -2 128+4=132 > ji : > > >@ 3-4 2-4 . ( AGCFAC KPDELTA KPMIN KPMAX LPC LPCW LPCLG NFRSZ NONR ) 16220 AGC 6 PITCH > 20 140 > ( ( > > ) PITCH > ) PIITCH > 50 10 10 20 (@ > 35 @ ) > @ NONRW 30 @ > @ NPWSZ NUPDATE 100 PITCH 4 > > > 87 G.728 > @ >> 20 NONRLG @ > @ 128 NCWD NG IDIM GOFF PPFTH PPFZCF TAPTH TILTF MAXINT - 8 >> - 5 @> > @ > >> > > > > @ 32×512 > off-set 9830 - 9830 >- 26214 > @ TAP PITCH > 4915 @ TAP tilt 32647 32 LPC+1 Q14 AL 3 Q13 AP 11 Q14 APF 11 Q13 ATMP LPC+1 Q13/Q14/Q15 AWP LPCW+1 Q14 AWZ LPCW+1 Q14 AWZTMP LPCW+1 > Q13/Q14/Q15 A AZ 11 1kHz LPC Q14 B Q16 BL Q19 D Q1 DEC Q1 ET IDIM 15b BFL FACV LPC+1 Q14 FACGPV LPCLG Q14 G2 NG Q12 88 1kHz LPC ( ) LPC G.728 > GAIN 1 SFL GB NG-1 @ Q13 GL Q14 GLB Q16 GP LPCLG+1 Q14 GPTMP LPCLG+1 Q13/Q14/Q15 GQ NG Q13 GSQ NG Q11 GSTATE LPCLG Q9 GTMP 4 Q9 H IDIM Q13 F(z)×W(z) ICHAN Q0 ICOUNT Q0 IG Q0 ILLCOND Q0 ILL-CONDITIONING ILLCONDG Q0 ILL-CONDITIONING ILLCONDP Q0 ILL-CONDITIONING ILLCONDW Q0 ILL-CONDITIONING IP Q0 KP,KP1 ) Q0 IS ( Q0,Q0 PITCH Q9 LOGGAIN LPFFIR LPC Q1 FIR LPFIIR Q1 NLSATMP Q0 IIR Durbin ATMP Q0 Durbin NLSAWZTMP AWZTMP Q0 NLSGPTMP Durbin GPTMP NLSET Q0 NLSGAIN Q0 89 ET G.728 > @ NLSREXP Q0 REXP NLSREXPLG Q0 REXPLG NLSREXPW Q0 REXPW NLSSB Q0 SB NLSST Q0 ST NLSSTATE Q0 STATELPC NLSSTTMP Q0 STTMP PN IDIM Q7 PTAP Q14 R BFL RC Q15 RC1 Q15 REXP LPC+1 BFL REXPLG LPCLG+1 PITCH ( (tap) ) BFL ) ( REXPW LPCW+1 BFL RTMP LPC+1 IDIM 15b Q2 ) BFL S ( SB Q9 SBW Q2 SCALE SFL SCALEFIL PCM) 14b BFL SBLG ( Q14 SD IDIM Q0 SPF IDIM Q2 SPFPCFV Q14 SPFZCFV Q14 SO byte SST(past) 13b Q0 SST(current) IDIM 15b Q2 ST IDIM 14b BFL STATELPC LPC 14b SBFL 90 ( U-Law/ A-Law) G.728 > @ Q2 STLPCI STMP ×IDIM 15b Q2 STTMP ×IDIM LPC 14b SBFL STPFFIR Q2 STPFIIR Q2 SU 1 SUMFIL 1 1 Q2 SW IDIM Q2 TARGET IDIM BFL PCM) Q2 SUMUNFIL ( Q2 ( ) . IDIM TEMP * . Q14 TILTZ tilt WFIR LPCW Q2 ( ) WIIR LPCW Q2 ( ) WNR 105 Q15 Q15 WNRLG WNRW 60 Q15 WPCFV LPCW+1 Q14 WS 105 # WZCFV LPCW+1 Q14 Y IDIM×NCWD Q11 . . Y2 NCWD Q5 ZIR IDIM 15b Q2 ZIRWFIR LPCW 15b Q2 ( ) ZIRWIIR LPCW 15b Q2 ( ) . . 14 91 : SFL : BFL Qx : Qx : 15b 14B G.728 > . @ :# Qx BFL : G.728-Anne×G > > @ > >> < G.7 . @ @ > @ @ > > main @ @ >. @ @ . 92 > @ G.728 > 93 @ G.728 > ( ) 94 @ G.728 > ( ) 95 @ G.728 > ( ) 96 @ G.728 > ( ) 97 @ G.728 > 98 @ G.728 > ( ) 99 @ G.728 > ( ) 100 @ G.728 > ( ) 101 @ G.728 > ( @ ) : G.728 : > > @ . . > @ ITU-T > @ >> @ @> > : IN… > : INCW*G… . < > > > @> > :CW… > :OUTA*G.. . > > > : OUB*G… . . . . (.BIN) @ @> > > >> @ 102 > @ > @ : CWCOMP G.728 > . ( )> @ > @ > MS-DOS 12-4 @ >@ . . ( FC/B FILE1 FILE2 > > (4-4) ) () (>) ( >) ITU-T @ > 12-4 -(4-4) 103 > FC > > ( : WSNR SNR > :FC > )> G.728 > > @> @ @ @ > . .> (4-4) .> 14 -4 @ BIT-EXACT @> ITU-T > @ >@ > > . @ >> 13-4 PCM > > > ( 104 ) >> @> G.728 > ( @> > > > . .> > SNRseg > . > SNR > @> @ > @ SNRseg > ) @> > @ > @ > M . > > @ > > 9 dB > N > > @ www.esud83.mihanblog.com email : aminnima2@gmail.com amin sheikh najdi 105 ...
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