EE4353_Lecture_2_Review_Long_Channel_MOSFET

EE4353_Lecture_2_Review_Long_Channel_MOSFET - EE 4353...

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EE 4353 Lecture 2 Long Channel MOSFET Professor H.-H. Tseng Aug 29, 2011
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L W 3-terminal device Field-effect : gate turns Xtor on and off when an E-field through gate oxide P Transistor: Gate-controlled potential barrier device Band diagram when Vg = 0 V No current flow betw S/D due to Potential barrier betw n+ and p
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(a) A Zero biased PN junction. The built-in potential in the energy band diagram (b) shows up as an upside down mirror image in the potential plot (c). 1 . Built-in E-field = - dV(x) /dx 2. Build-in electrostatic potential bi 3. Build-in potential referred to unit positive charge as the standard definition of voltage bi is always higher in N-side (positive ions) 5. Energy diagram plots the potential energy of an electron form an upside down mirror image of build-in potential plot 6. Ec is always lower in N-side bi = (kT/q) ln ( N d N a / ni 2 ) DL
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The threshold condition : n s = N a , or ϕ s = ϕ st = 2 ϕ B = (2kT/q) ln ( Na / n i ) where q ϕ B = E i - E F Smaller Na smaller ϕ B Threshold voltage: Vg = V t = V fb + ϕ s – Q dep /C ox = V fb + 2 ϕ B + 2 [q Na s ϕ B ] 1/2 / Cox General relationship: Vg = Vfb + ϕ s +Vox The most fundamental parameter for MOS capacitor Is the substrate semiconductor dopant concentration, either Na or Nd . ** Before reaching threshold condition, inversion electrons are already existing (weak inversion) i.e. Vg < Vt n s is small but can allow a small leakage to flow REVIEW
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An MOS capacitor biased into inversion , Vg>Vt (a) Types of charge present (b) energy band diagram with arrow indicating the sense of positive V g Max depletion region Inversion region Vg = V fb + 2 ϕ B + [qNa2 s 2 ϕ B ] 1/2 / Cox – Q inv /Cox = Vt - Q inv /Cox or Q inv = - Cox (Vg-Vt) W dep,m = [2 s 2 B /(qNa)] 1/2 = 2 [ s B /(qNa)] 1/2 REVIEW
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Transistor Output Characteristics: Id vs Vd; Vg as parameter
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W With a Vd applied, there is a voltage rise Vx from the source to each point in the channel, the surface potential (voltage) at each point: ϕ s (x) = 2 ϕ B + Vx Q inv (x) = - C ox (Vg- Vt - Vx )
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Operations of the MOSFET and output I-V characteristics. ( a ) Low drain voltage. V D < lV G -V T l (or lV G -V D l > V T ) Linear region (Gate-controlled resistor) ( b ) Increases Vd dI d /dV d decreases Onset of saturation. Point P indicates the pinch-off point. (Q inv = 0 at Drain) V D,sat = lV G -V T l (or lV G -V D,sat l = V T ) ( c ) Saturation: V D > V D,sat V D > lV G -V T l (or lV G -V D l < V T ) Id = (1/R) Vd
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1.Linear region ( V D < lV G -V T l ) Id dx = ns W lQ inv (x)l dVx I d = (W/L) ns C ox [ (Vg-Vt)V d – (1/2) V d 2 ] = (W/L) ns C ox (V g -V t )V d ( for V D << lV G -V T l ) , truly linear to Vd 2. Saturation region Vd > V dsat (= lVg – Vtl) I dsat = (1/2) (W/L) ns C ox (Vg-Vt) 2 (not a function of Vd !) = (1/2) (W/L) ns C ox V dsat 2 The physical reasons for Id increases as Vg: Vg increases ϕ s increases more band bending n s increases Id increases
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What is I on ? Inversion Saturation Region
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EE4353_Lecture_2_Review_Long_Channel_MOSFET - EE 4353...

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