Chapter11 ParallelIO

Chapter11 ParallelIO - Software and Hardware Engineering...

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Unformatted text preview: Software and Hardware Engineering: Motorola M68HC12 Copyright © 2000 by Oxford University Press, Inc. Chapter 11 M68HC12 Parallel Input/Output Software and Hardware Engineering: Motorola M68HC12 Copyright © 2000 by Oxford University Press, Inc. Overview Issues Device selection: I/O address decoding Data transfer: amount, rate, to/from device Synchronization Bus structures Links: Internal bus, system bus, data link Memory-mapped I/O Synchronization Programmed I/O Interrupt-driven I/O DMA (Direct Memory Access ) Software and Hardware Engineering: Motorola M68HC12 Copyright © 2000 by Oxford University Press, Inc. Interface between CPU and external device Two links: Different data widths Different speeds (data rates) May not be ready “at the same time” Interface System bus Data link CPU “Device” Software and Hardware Engineering: Motorola M68HC12 Copyright © 2000 by Oxford University Press, Inc. Simple output: LED Usually use resistor to limit current: Software and Hardware Engineering: Motorola M68HC12 Copyright © 2000 by Oxford University Press, Inc. 7-segment LED/LCD display May use parallel or multiplexed port outputs. a c g e d b f a c g e d b f Select digit Data[6:0] Common anode or Common cathode Software and Hardware Engineering: Motorola M68HC12 Copyright © 2000 by Oxford University Press, Inc. Switch debouncing A switch must be debounced to multiple contacts caused by eliminate mechanical bouncing: Debounce in hardware (latch) or software (delay) +V Software and Hardware Engineering: Motorola M68HC12 Copyright © 2000 by Oxford University Press, Inc. Example – 10-key matrix keypad 1 Drive (output pins) 1 1 1 Read (input pins) 1 Pull-up Resistors Pressed Key 10K +5v Software and Hardware Engineering: Motorola M68HC12 Copyright © 2000 by Oxford University Press, Inc. Parallel input/output ports Parallel input port = portal through which a CPU can access information FROM an external device Parallel output port = portal through which a CPU can send information TO an external device A number of I/O ports are contained in the HCS12 chips I/O ports external to the HCS12 chip can be added in expanded mode Software and Hardware Engineering: Motorola M68HC12 Copyright © 2000 by Oxford University Press, Inc. HCS12 on-chip parallel I/O ports “Parallel port” => multiple bits read/written in parallel by the CPU Each port comprises one or more registers Each register is assigned a unique memory address CPU reads/writes data via a data register Data direction register (DDR) for each port determines whether each pin is input or output Software and Hardware Engineering: Motorola M68HC12 Copyright © 2000 by Oxford University Press, Inc....
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Chapter11 ParallelIO - Software and Hardware Engineering...

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