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Unformatted text preview: Chapter 4. Sketch the circuit, showing the modules, the above-described control signals, and their interconnections. 2. Design a 4-bit bidirectional shift register with parallel-load capability. The shift register has four parallel inputs, D3-D2-D1-D0, four outputs, Q3-Q2-Q1-Q0, two serial inputs, SHR and SHL, a clock input, and two control lines, C1-C0, that select the function to be performed, as follows. Whenever the clock activates, one of the four functions is to be performed, as selected by C1-C0. C1-C0 Function 0 0 Hold register does not change 0 1 Load the parallel inputs D3-D0 into Q3-Q0 1 0 Shift one bit to the left, with SHL shifted into Q0 1 1 Shift one bit to the right, with SHR shifted into Q3 a. Design the shift register using D flip flops, with multiplexers at their inputs. b. Redesign the shift register using JK flip flops instead of D flip flops....
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This note was uploaded on 09/23/2011 for the course ELEC 2200 taught by Professor Singh during the Summer '08 term at Auburn University.
- Summer '08