Chapter3 Interrupts

Chapter3 Interrupts - Interrupt-Driven Input/Output Chapter...

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Interrupt-Driven Input/Output Chapter 3: Section 3.2.4 LPC2292 User Manual
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Interrupt I/O Busy/wait is very inefficient. CPU can’t do other work while testing device. Hard to do simultaneous I/O. Interrupts allow a device to change the flow of control in the CPU. Causes subroutine call to handle device.
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Interrupt interface CPU status reg data reg mechanism PC intr request intr ack data/address IR
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Interrupt behavior Based on subroutine call mechanism. Interrupt forces next instruction to be a “subroutine call” to a predetermined location. Return address is saved to resume executing foreground program . “Context” switched to interrupt service routine
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Interrupt physical interface CPU and device are connected by CPU bus. CPU and device handshake: device asserts interrupt request; CPU asserts interrupt acknowledge when it can handle the interrupt. (See ARM interrupt support)
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Example: character I/O handlers #define IN_DATA (*((volatile unsigned byte *) 0xE0028018)) #define IN_STATUS (*((volatile unsigned byte *) 0xE002801C)) void input_handler() { achar = IN_DATA; //global var gotchar = TRUE; //signal main prog IN_STATUS = 0; //reset status } void output_handler() { } //interrupt signals char done
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This note was uploaded on 09/23/2011 for the course ELEC 6260 taught by Professor Nelson,v during the Summer '08 term at Auburn University.

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Chapter3 Interrupts - Interrupt-Driven Input/Output Chapter...

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