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Unformatted text preview: ECE 100 Lab 3 The Voltage Follower Circuit Winter 2011 The objective of this assignment is to study the follower feedback circuit when implemented with real opamps.
Ideal opamps have infinite gain, infinite input impedance, and zero output impedance. Real opamps are very
complex, usually consisting of 10’s of transistors and many passive elements. However a firstorder VCVS model
captures much of the important behavior of a real opamp. In this model we define gain A(s) = G/s or A(ω) = G/jω
where G is called the unitygain bandwidth. It is always greater than 1 Mhz, and sometimes as high as 1 Ghz. The
input impedance is RD > 1 MΩ and the output impedance is RO < 100 Ω.
A. Analysis:
1. Unloaded: The normal followerwithgain circuit is sketched to the right. Here we assume that R O << R2 + R3
and RD >> R2 in parallel with R3. If R2 and R3 are of the order of 10 K, this will be the case. With this
simplification B = R3/(R2+R3) and it is easy to calculate: the transfer function H(s) = A(s)/(1 + A(s)B); the input
impedance ZIN(s) = RD(1 + A(s)B); and the output impedance ZOUT(s) = RO/(1 + A(s)B).
(a) Write rationalized polynomial expressions for H(s), ZIN(s), and ZOUT(s) in
terms of G, B, RD and RO.
(b) Show that H(s) is the transfer function of a lowpass filter with a dc gain of
1/B and a –3dB bandwidth of G*B. Thus the product of the dc gain and the
bandwidth is (1/B)*G*B = G. This is the origin of the useful rule “the gainbandwidth product of a feedback amplifier is constant.” One must remember
that this “rule” only applies to the firstorder model of the opamp.
(c) Show that ZIN(s) can be modeled as a capacitor in series with RD. So even
when A is large, ZIN is not resistive, it is capacitive.
(d) Show that ZOUT(s) can be modeled as an inductor in parallel with RO. So even when A is large ZOUT is not
resistive, it is inductive.
2. With Capacitive Load: These results do not mean that the follower is not useful as a buffer, simply that it may
behave in unexpected ways. For example when loaded by a large capacitance it may behave like a resonant circuit
rather than the ideal voltage source that one might have expected.
(a) Write the transfer function of the circuit when a capacitor CL is connected from the output to ground. Here R0
and CL act like a lowpass filter. Put your expression in normalized form. You will find that the denominator of
the transfer function is looks exactly like an RLC resonant circuit. Find ω0 and ζ in terms of G, B, and τ = ROCL.
(b) If the CL is large, for example if the buffer is driving a long run of coaxial cable, the damping factor can be
quite small and the step response will show a great deal of “ringing”. This is a common problem in both analog
and digital integrated circuits. In large scale digital systems it can occur in the buffers which drive the system
clock to the various logic components. It can be reduced or eliminated by putting a “compensation” resistor RC in
series with CL. Find the transfer function of the modified circuit. Show that ζ can be adjusted by choosing RC
without making a significant change in the bandwidth ω0.
B. Simulations:
1. Unloaded Gain*Bandwidth Product:
(a) Simulate a follower with gain of 1, 3, 10, 30, and 100. For the opamp use a VCVS with a gain A(s) = G/s,
where G = 2 π 106. The VCVS called ELAPLACE allows you to specify A(s). Measure the –3dB bandwidth in
each case. Confirm that the gain*bandwidth product is constant. You can do all the simulations at once using the
Parameter property and a Parameter Sweep. Add a Parameter box to your schematic. Enter a parameter called “r”
and give it a value of 1k. Then set R2 = 10K and R3 = {r}. In the analysis setup menu add a Parameter Sweep
with a value list. Enter the values of R3 required to give the gains listed above. Pspice will then do an AC Sweep
for each value of r in the list and overplot them all. Make a hard copy of the plot. You will still have to measure
the –3dB frequency manually with the cursor. (b) Repeat the simulation for a follower with gain of 1, 3, 10, 30, and 100 using the macromodel for an uA741 op
amp. Remember to connect up the power supplies. Note that the –3dB bandwidth is defined with respect to the dc
gain, not the maximum gain. You will see that the gainbandwidth product is constant for the higher gains, but
increases near unity gain. In fact the uA741 has several poles and a right half plane zero. It is the phase lag due to
these high frequency “features” which causes the gainbandwidth product to change. They have other interesting
effects too  they can make the follower oscillate under certain conditions.
2. Effect of Capacitive Load: We can test this with a unitygain follower.
(a) Use the uA741 macromodel in unity gain follower configuration to simulate the step response for load
capacitances of 100pf 300pf 1nf 2nf 4nf 6nf and 10nf. Use the PARAM feature to get Pspice to run the entire list
at one time and overplot the results. A time range of 0 to 2 us should be sufficient. Make a hard copy of the plot.
You will see that loads larger than 100pf can cause a lot of ringing. The typical capacitance of a coaxial cable is
30pf/ft. So it is easy to get a lot of ringing driving a cable incautiously.
(b) Put a 25 Ω resistor in series with the load capacitance and rerun the simulation. You will see that it seriously
quenches the overshoot. In practice you would adjust the compensation resistor to be as small as possible,
consistent with the desired overshoot, because larger resistors will cause a slower risetime. Generally you would
like the shortest feasible risetime.
C. Measurements:
1. Unloaded Gain*Bandwidth Product: In this section we will measure the gain bandwidth product of the
follower under the same conditions as the simulation in Part 3. The measurements will require some care and the
circuit will have to be laid out neatly because the bandwidth is large. Bypass both dc supplies to ground with an
0.1uF capacitor placed close to the chip. Special care is needed for the feedback when B=1. You will not be able
to use R2=10K and R3=some large value, because the capacitance on the breadboard is about 6pf to ground and
this will cause enough phase shift to greatly increase the ringing (or even make it oscillate). Set R2=short circuit
and R3=open circuit instead. The exact values of the gain are not important – use the closest convenient resistors.
First check the calibration of your scope probe s and adjust if necessary. It will be necessary to respect the “slewrate limit.” For the uA741 this is about 2 v/us. This means that dVO/dt < 2 v/us. If VO(t) = A sin(2πft) then dVO/dt
= 2πf A cos(2πft). So we need A < 2 106 / 2π f or slew rate limiting will occur and mess up our measurements,
e.g. at f = 1 Mhz the peaktopeak VO < 0.6 v. If the gain = 100 that means that the input voltage will be only 6
mv. This is low to measure or trigger from and you may need to trigger from the output and use averaging to
reduce the noise on the input. It will be necessary to use the 10X probe setting on the output because the 1X probe
has considerable capacitance. You can use the 1X probe setting on the input though. Measure the gainbandwidth
product for each of the cases you simulated in Part 3(b). Remember that –3dB is with respect to the dc gain not
the peak gain.
2. Capacitive Load: In this section we will measure the effect of a capacitive load on a unitygain follower, as
simulated in section 4. The same precautions against slew rate limiting apply. This means that the input step must
be <<1 v, and you will need to use the 10X probe setting on the output. You might as well use it on both because
both signals will be about the same amplitude. Remember to use R2=short circuit and R3=open circuit or you will
see too much overshoot caused by the bread board.
(a) Measure the overshoot for (roughly) the same capacitances that you used in the simulation. Here the exact
values are not important. You may find that the follower actually oscillates with some values of CL. If it does
oscillate the amplitude will be limited by the slew rate, so you won’t necessarily see a large signal. What you
might see is a ringing that never dies away. If this happens make a hard copy for your report.
(b) In a practical situation you would have a certain load capacitance, say 3 nf, and you would want to compensate
it to get the shortest risetime consistent with some maximum overshoot, say 5%. Connect a 3 nf load and
optimize the compensation resistor. What resistor works best? What was the optimal 10% to 90% rise time? Make
a hard copy of the optimized step response. Demonstrate the circuit to the TA and ask him to sign the hard copy. ...
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 Spring '09
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