74LS04 - DM74LS04 Hex Inverting Gates August 1986 Revised...

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© 2000 Fairchild Semiconductor Corporation DS006345 www.fairchildsemi.com August 1986 Revised March 2000 DM74LS04 Hex Inverting Gates DM74LS04 Hex Inverting Gates General Description This device contains six independent gates each of which performs the logic INVERT function. Ordering Code: Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code. Connection Diagram Function Table Y = A H = HIGH Logic Level L = LOW Logic Level Order Number Package Number Package Description DM74LS04M M14A 14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-120, 0.150 Narrow DM74LS04SJ M14D 14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide DM74LS04N N14A 14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide Input Output AY LH HL
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www.fairchildsemi.com 2 DM74LS04 Absolute Maximum Ratings (Note 1) Note 1: The “Absolute Maximum Ratings” are those values beyond which the safety of the device cannot be guaranteed. The device should not be operated at these limits. The parametric values defined in the Electrical Characteristics tables are not guaranteed at the absolute maximum ratings.
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This note was uploaded on 09/25/2011 for the course ECEL 304 taught by Professor Fontecchio during the Winter '07 term at Drexel.

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74LS04 - DM74LS04 Hex Inverting Gates August 1986 Revised...

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