Lecture8 - ECE-L304 Lecture 8 Continue Step 6 Second of two...

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ECE-L304 Lecture 8 Continue Step 6 Second of two weeks
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ECE-L304 Lecture 8 2 This Week Complete assembly of 16-bit counter Design and build circuit for 17th bit Test address generator Build RAM read/write control circuit Test RAM read/write control circuit Measure time delay of 2 AND gates
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ECE-L304 Lecture 8 3 Project Circuit This Week ADC DAC 8 8 RAM Address Gen R/W Control Clock 17 2
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ECE-L304 Lecture 8 4 RAM Read/Write Control Circuit used in the Step 4 simulation Q Q RCO from Address Generator TC = Terminal Count
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ECE-L304 Lecture 8 5 RAM Read/Write Control RE = Read Enable OE = Output Enable WE = Write Enable All are active HIGH
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ECE-L304 Lecture 8 6 RAM Read/Write Control CE1_ CE2 OE_ WE_ Mode I/O Supply Current H X X X Not Selected High Impedance I SB X L X X I CCA L H H H Output Disable L H L H Read D OUT L H X L Write D IN
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ECE-L304 Lecture 8 7 WE_ Controlled Write
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ECE-L304 Lecture 8 8 CE1_ Controlled Write
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ECE-L304 Lecture 8 9 CE2 Controlled Write
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ECE-L304 Lecture 8 10 Read Cycle Timing
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This note was uploaded on 09/25/2011 for the course ECEL 304 taught by Professor Fontecchio during the Winter '07 term at Drexel.

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Lecture8 - ECE-L304 Lecture 8 Continue Step 6 Second of two...

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