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ENEE244hw05

# ENEE244hw05 - ENEE244 Homework#5(1101 Assigned Due 12:30 pm...

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2. Design a combinational circuit that adds two binary numbers x and y and produces two binary numbers C (for carry) and S (for sum). This circuit is called a half adder. (a) Construct a truth table of the half adder. (b) Using Karnaugh maps, obtain simplest SOP expressions for C and S . (c) Implement the half adder using AND and OR gates only and draw a logic diagram. You may assume double-rail logic. (d) Implement the half adder using an XOR gate and an AND gate only and draw a logic diagram. 3. Show algebraically that a full adder can be realized by two half adders and an OR gate. Then draw a logic diagram. Assume that the full adder has three inputs x , y , and c in and two outputs c out and s . 4. Design a combinational circuit that multiplies two 2-bit numbers, a 1 a 0 and b 1 b 0 , to produce a 4-bit product, c 3 c 2 c 1 c 0 . (a) Construct the truth table. (b) Derive a simplest Boolean function in SOP form for each output. (c) Realize the circuit using AND gates and half adders. Draw a logic diagram.

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• Spring '08
• PETROV
• Boolean Algebra, Binary numeral system, Logic gate, Binary-coded decimal, Logical connective, logic diagram

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ENEE244hw05 - ENEE244 Homework#5(1101 Assigned Due 12:30 pm...

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