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**Unformatted text preview: **3/3/2011 1 Chapter 11, MOS Transistors 1 11.1.1 Modeling the MOS Transistor (1) Effective Gate Voltage: V GSt = V GS V t (2) I D V DS of NMOS: Triode ( 0 < V DS < V GSt ) I D = k (V GSt V DS /2) V DS Saturation (V DS > V GSt ) I D = (k/2) V GSt 2 2 Device Transconductance, k k = k (W/L) Process Transconductance, k k = m e e r / t ox = m C ox = set by process technology. 3 Use m n = 675 cm 2 /Vs, m p = 240 cm 2 /Vs, e = 8.85X10-14 F/cm NMOS: k n = 23000/t ox m A/V 2 PMOS : k p = 8200/t ox m A/V 2 k n (2-3) x k p & t ox in [Angstrom] Dielectric breakdown of oxide = 1 V/nm limit E max = 300 mV/nm t ox,min = V op /E max = 3.33 V op [nm] = 33.3 V op [A] Maximum possible: NMOS: k n = 690/V op m A/V 2 PMOS : k p = 240/V op m A/V 2 V op = 5 volts gives 138 m A/V 2 for NMOS, and 48 m A/V 2 for PMOS. 3/3/2011 2 11.1.2 Parasitics of MOS Transistors Equivalent Circuit 4 NMOS in P-epi : NMOS Cross-section N+ P N+ P+ 11.1.2 Parasitics of MOS Transistors NMOS in P-epi : NMOS Cross-section Equivalent Circuit P N+ N+ 5 P+ R D , R S are minimized by siliciding the surfaces of S/D diffusions ( clad moats ). R G is minimized by siliciding the Gate Poly ( clad gate ) 11.1.2 Parasitics of MOS Transistors NMOS in P-epi : NMOS Cross-section Equivalent Circuit P N+ N+ 6 P+ Q1 = NPN = Source-to- Backgate-to- Drain for a possible minority electron path. If they flow into adjacent wells, then CMOS latch up ! 3/3/2011 3 11.1.2 Parasitics of MOS Transistors NMOS in P-epi : NMOS Cross-section Equivalent Circuit P N+ N+ 7 P+ D DB , D SB are under reverse bias (if avalanche breakdown Zener), and mainly add Junction Capacitance to ckt. 11.1.2 Parasitics of MOS Transistors NMOS in P-epi : NMOS Cross-section Equivalent Circuit P N+ N+ 8 P+ 11.1.2 Parasitics of MOS Transistors NMOS in P-epi : NMOS Cross-section Equivalent Circuit P N+ N+ 9 P+ 3/3/2011 4 PMOS in N-well : Equivalent Circuit Psource-Nwell-Pepi Pdrain-Nwell-Pepi P+ P+ NWel P-epi PMOS Xsection N+ 10 PMOS in N-well : P+ P+ NWel P-epi PMOS Xsection Equivalent Circuit N+ 11 Parasitic N P N-P N P Makes a parasitic SCR CMOS Latchup The positive feedback between the parasitic NPN of NMOS and parasitic PNP of PMOS leads to Circuit latchup. P P N N 12 Note that the Collector of one BJT becomes the Base of the other BJT, thereby leading to a positive feedback: I BP b P I BP = I BN b N I BN = b N b P I BP b P b N b P I BP 3/3/2011 5 When a positive current is applied to terminal G, transistor Q2 is biased into conduction , causing its collector current to rise. Since the current gain of Q2 increases with increased collector current, a point (called the breakover point) is reached where the loop gain equals unity and the circuit becomes regenerative. At this point, collector current of the two transistors rapidly increases to a value limited only by the external circuit . Both transistors are driven into saturation, and the...

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