PowerTransistor_BJT_MOS-2011

PowerTransistor_BJT_MOS-2011 - 3/29/2011 1 POWER TRANSISTOR...

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Unformatted text preview: 3/29/2011 1 POWER TRANSISTOR LAYOUT I < 10 mA P < 100mW small signal I = 100mA 2A P = 500mW 10W Power Tr needs special layout 1 POWER TRANSISTOR LAYOUT to switch and regulate large amounts of power Power BJT small-signal BJTs: a fraction of 1mA uses min.area emitter layout Power transistors: low b due to high I C density (>1 uA/um 2 ). Typically, b 10 Power MOS compared to Power NPN: lack of saturation delay (order 1 us in BJT which has upper switching freq. 0.5MHz) simpler drive requirements lower forward voltage (especially at low I d ) can switch well higher than 1MHz 1Amp Power MOS needs only a few mA for Gate-drive circuit 1Amp Power BJT may need 100mA Base-drive circuit due to typical high-I C b =10. can conduct high I D at low V DS . According to Shichman-Hodges eq in Triode mode: I D = k (V GS-V t )V DS + kV DS 2 /2 k (V GS-V t )V DS for V DS << (V GS-V t ) MOS becomes a R DS(on) 1/k(V GS-V t ) Discrete PowerMOS R DS(on) = a few m W ex) R DS = V DS /I D = 0.01V/1A=10m W , from V DS /I D = 1/kV GSt , we get ( W/L )=1/kV GSt R DS = 1/(100uA/V 2 *2.5V*10m W )= 400,000 ! Integrated PowerMOS has R DS(on) = 25m W 1 W due to area constraint in IC 2 9.1 Power BJT Because of high-I c rolloff (>1.5uA/um 2 ), emitter area increases. In order to conserve space, work at lower beta than small-signal BJTs. b min acceptable = 10 (power NPN can handle 8-15 uA/um 2 ). Lateral PNP can not achieve more than 250uA/ min.emitter Small-signal BJT: can handle 10 mA, 100 mW Power BJTs for >100mA, >500mW need special layout, up to as high as 10A & 100W Most IC power NPN: I<2A & P<10W Power PNP: I<500mA. 3 3/29/2011 2 Failure of Power NPN Emitter debiasing thermal runaway secondary breakdown 4 Metal lead R (A) Emitter debiasing some Tr may not even conduct Ex) suppose I E = 50mA, R = 1.2m W each interconnect R total Volt drop 50mA* 1.2m W + 100mA* 1.2m W + 150mA* 1.2m W =3.6mV D I E /I E = e 3.6mV/26mV-1 = 1.15 -1 = 15% 5 15% more current than Q1 ! V e1 V e1-3.6mV (A) Emitter debiasing some Tr may not even conduct Ex) suppose I E = 50mA, R = 1.2m W each interconnect R total Volt drop 50mA* 1.2m W + 100mA* 1.2m W + 150mA* 1.2m W = 3.6mV D I E /I E = e 3.6mV/26mV-1 = 1.15 -1 = 15% 6 3/29/2011 3 (B) Use Emitter Ballasting R to reduce impact of E debiasing Insert R at Emitter node typically 50-75mV drop at max full rated current Ex) 50mA Em. 1 W R 7 (B) Use Emitter Ballasting R to reduce impact of E debiasing Insert R at Emitter node typically 50-75mV drop at full rated current Ex) 50mA Em. 1 W R Ex) (1) 3.6mV debiasing (2) current change in Ballasting Rs (3) Emitter terminal voltage remains constant D = +1.8mV D = -1.8mV 50mA+1.8mA 50mA-1.8mA 1 W 1 W 1 W 1 W 8 (B) Use Emitter Ballasting R to reduce impact of E debiasing Insert R at Emitter node typically 50-75mV drop at full rated...
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PowerTransistor_BJT_MOS-2011 - 3/29/2011 1 POWER TRANSISTOR...

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