Lecture 36 Part 1 Problem 10.26 Y=aBC+AbC+ABc_1

Lecture 36 Part 1 Problem 10.26 Y=aBC+AbC+ABc_1 - EE 311...

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EE 311 Lecture 36 Part 1 10.3 CMOS Logic-Gate Circuits Problem 10.26 (5 th edition) Synthesis of Y = A*B*C + A*B*C + A*B*C Zubair Rehman

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2 1. The PDN can be most directly synthesized by expressing Y (Inverse of Y) as a function of un-complemented variables. If complemented variables appear in this expression, additional inverters will be required to generate them. PUN is the dual of PDN 1. The PUN can be most directly synthesized by expressing Y as a function of the complemented variables and then applying the uncomplemented variables to the Gates of the PMOS transistors. If un-complemented variables appear in the expression, additional inverters will be needed. PDN is the dual of PUN Obtaining the PUN from the PDN and Vice Versa 1) 2) A series branch in one corresponds to a parallel branch in the other. 3) Inputs are the same in dual e.q. Input A in PDN is Input A in PUN (In other words do not replace A in PDN by A in PUN)
3 (a) How many transistors it needs? (b)

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Lecture 36 Part 1 Problem 10.26 Y=aBC+AbC+ABc_1 - EE 311...

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