EE311LAB8 - (for DC SWEEP) labeled to match Fig. 7.35 8. DC...

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1. Schematic showing all transistors (Q1 through Q4)  and dc supplies VDD, VSS, and  Voffset (for DC SWEEP) labeled to match Fig. 7.28 with W and L displayed on  schematic to facilitate TA inspection.  
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2. DC Sweep of Voffset to determine the offset voltage Voffset: 3. QP check on all transistors to determine if dc bias currents are as expected:
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4. AC Sweep to determine differential voltage gain A d
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5. AC Sweep to determine output resistance  R o 6. AC Sweep to determine common-mode voltage gain
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7. Schematic showing all transistors (Q1 through Q7) and dc supplies VCC, VEE, and VBB 
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Unformatted text preview: (for DC SWEEP) labeled to match Fig. 7.35 8. DC Sweep of VOS to determine the offset voltage VOS 9. QP check on all transistors to determine if dc bias currents are as expected 11. AC Sweep to determine output resistance Ive showed result of problem. 10 to TA in the LAB and got a signature. But a graph is missing. So, I mailed it to TA regards to this issue. He answered my e-mail. If you already got all signatures, it is no need to redo it Thank you!!!...
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This document was uploaded on 09/28/2011.

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EE311LAB8 - (for DC SWEEP) labeled to match Fig. 7.35 8. DC...

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