VLSI_Class_Notes_5_2010 - EEL 5322 W.R.Eisenstadt-1 VLSI...

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EEL 5322 W.R.Eisenstadt - 1 - VLSI Class Notes Fall 2010, Class 5 Reading Today: Jaeger Chap. 4.1, 4.2, 4.3 Homework #4 Problems Due Friday September 10, 2010. Problem 4.3 Jaeger, read through section 4.7.1 you may use the curves in 4.16 for finding sheet resistance. Problem 4.6 part a) p. 104 Jaeger, but calculate deposition time at 975 o C. b) What is the deposition time? Assume that it takes 5 minutes for ramping the wafer temperature up from room temperature to 975 o C and down from 975 o C to room temperature the diffusion process. Is this a reasonable process step in that the diffusion time is much greater that the furnace temperature ramping time? c) In the diffusion furnace temperature varies from 960 o C to 990 o C what is the variation in the junction depth for the Dt and deposition time calculated in parts a) and b) Lecture discussion : DIFFUSION Fick s first law of diffusion N J D x = - (5.1) J: Flux of diffusing dopants D: Diffusion coefficient of dopants or impurities N: Dopant concentration, (No. of dopants)/cm 3 Continuity Equation in one dimension. N J t x = - (5.2) The time dependent continuity equation says that the amount dopant flux coming out of a volume has to be accompanied by a change of concentration in that volume. In three dimensions the Continuity Equation becomes: 0 dN J dt + = g (5.3) Fick s second law of diffusion combines the Fick
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This note was uploaded on 10/02/2011 for the course ECE 5322 taught by Professor Ei during the Spring '10 term at University of Florida.

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VLSI_Class_Notes_5_2010 - EEL 5322 W.R.Eisenstadt-1 VLSI...

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