Set_6-1 - (a) Graphical symbol f s w w 1 1 (b) Truth table...

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Unformatted text preview: (a) Graphical symbol f s w w 1 1 (b) Truth table 1 f f s w w 1 (c) Sum-of-products circuit s w w 1 Multiplexers Multiplexers Digital switch A multiplexer with w data sources requires s = log 2 w select lines. Commercially available multiplexers (MUX) have n= 1, 2, 4, 8 or 16. Multiplexers may also have enable inputs. f s 1 w 0 w 1 00 01 (b) Truth table w 0 w 1 s 0 w 2 w 3 10 11 0 0 1 1 1 0 1 f s 1 0 s 0 w 2 w 3 f (c) Circuit s 1 w 0 w 1 s 0 w 2 w 3 (a) Graphic symbol 4-to-1 Multiplexer 0 w 0 w 1 0 1 w 2 w 3 0 1 f 0 1 s 1 s w 8 w 11 s 1 w 0 s 0 w 3 w 4 w 7 w 12 w 15 s 3 s 2 f Cascading Multiplexers 74x151 74x151 74x153 74x153 74x157 74x157 Function Realization Using Multiplexers Each product term (minterm) may be enabled or disabled, by setting their respective input line to either logic 1 or logic 0 , thus generating the desired sum of minterms. Ex: Implement f = (A,B,C) (0,3,4,5) Function Realization Using Multiplexers One may improve on the previous procedure by using the following artifice: Assume n = m +1; Use a 2 m-to-1 multiplexer and connect m input variables to the m select lines; The remaining input variable, which for simplicity is labeled as A, is used to excite the data inputs of the multiplexer. Now these inputs can be excited with the following values: A, A, 1 or 0, thus generating the desired sum of minterms. Figure 6.7. Synthesis of a logic function using multiplexers. (a) Implementation using a 4-to-1 multiplexer f w 1 0 1 0 1 w 2 1 0 0 0 1 1 1 0 1 f w 1 0 w 2 1 0 (b) Modified truth table 0 1 0 0 1 1 1 0 1 f w 1 0 w 2 1 0 f w 2 w 1 0 1 f w 1 w 2 w 2 (c) Circuit Figure 6.8. Figure 6....
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This note was uploaded on 10/02/2011 for the course HNRS 1003 taught by Professor Zerba during the Spring '08 term at LSU.

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Set_6-1 - (a) Graphical symbol f s w w 1 1 (b) Truth table...

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