Day1-06_DevelopingCodeforCell-SIMD

Day1-06_DevelopingCodeforCell-SIMD - IBM Systems Technology...

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© 2007 IBM Corporation Cell Programming Workshop 10/03/11 1 Developing Code for Cell - SIMD Cell Programming Workshop Cell/Quasar Ecosystem Solutions Enablement
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© 2007 IBM Corporation 2 Cell Programming Workshop 10/03/11 Course Objectives Learn how to vectorize a scalar program to exploit the power of Cell BE How to use SPU intrinsics
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© 2007 IBM Corporation 3 Cell Programming Workshop 10/03/11 Course Agenda Vector Programming (SIMD) Data types for vector programming Application partitioning SPU Intrinsics Trademarks - Cell Broadband Engine ™ is a trademark of Sony Computer Entertainment, Inc.
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© 2007 IBM Corporation 4 Cell Programming Workshop 10/03/11 Vector Programming
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© 2007 IBM Corporation 5 Cell Programming Workshop 10/03/11 SIMD Architecture SIMD = “single-instruction multiple-data” SIMD exploits data-level parallelism a single instruction can apply the same operation to multiple data elements in parallel SIMD units employ “vector registers” each register holds multiple data elements SIMD is pervasive in the BE PPE includes VMX (SIMD extensions to PPC architecture) SPE is a native SIMD architecture (VMX-like) SIMD in VMX and SPE 128bit-wide datapath 128bit-wide registers 4-wide fullwords, 8-wide halfwords, 16-wide bytes SPE includes support for 2-wide doublewords
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© 2007 IBM Corporation 6 Cell Programming Workshop 10/03/11 A SIMD Instruction Example Example is a 4-wide add each of the 4 elements in reg VA is added to the corresponding element in reg VB the 4 results are placed in the appropriate slots in reg VC A.0 A.1 A.2 A.3 B.0 B.1 B.2 B.3 + + + + C.0 C.1 C.2 C.3 Reg VA Reg VB Reg VC vector regs add VC,VA,VB
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© 2007 IBM Corporation 7 Cell Programming Workshop 10/03/11 16-byte boundaries 16-byte boundaries
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© 2007 IBM Corporation 8 Cell Programming Workshop 10/03/11 SIMD “Cross-Element” Instructions VMX and SPE architectures include “cross-element” instructions shifts and rotates permutes / shuffles Permute / Shuffle selects bytes from two source registers and places selected bytes in a target register byte selection and placement controlled by a “control vector” in a third source register extremely useful for reorganizing data in the vector register file
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This note was uploaded on 10/03/2011 for the course CDA 6938 taught by Professor Zou,c during the Spring '08 term at University of Central Florida.

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Day1-06_DevelopingCodeforCell-SIMD - IBM Systems Technology...

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