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Day2-14_CellProgrammingTips&Techniques-SDK30

Day2-14_CellProgrammingTips&Techniques-SDK30 - IBM...

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IBM Systems & Technology Group Cell/Quasar Ecosystem & Solutions Enablement Cell Programming Workshop 3/2/2008 © 2007 IBM Corporation 1 CellBE Programming Tips & Techniques Cell Programming Workshop Cell/Quasar Ecosystem & Solutions Enablement
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Systems and Technology Group 3/2/2008 Cell Programming Workshop 2 Class Objectives – Things you will learn ! Key programming techniques to exploit cell hardware organization and language features for SPE SIMD Trademarks - Cell Broadband Engine and Cell Broadband Engine Architecture are trademarks of Sony Computer Entertainment, Inc.
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Systems and Technology Group 3/2/2008 Cell Programming Workshop 3 Class Agenda ! SPU Programming Tips Level of Programming (Assembler, Intrinsics, Auto- Vectorization) Overlap DMA with computation (double, multiple buffering) Dual Issue rate (Instruction Scheduling) Design for limited local store Branch hints or elimination Loop unrolling and pipelining Integer multiplies (avoid 32-bit integer multiplies) Avoid scalar code Choose the right SIMD strategy Load / Store only by quadword ! SIMD Programming Tips
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Systems and Technology Group 3/2/2008 Cell Programming Workshop 4 SPU Programming Tips
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Systems and Technology Group 3/2/2008 Cell Programming Workshop 5 SPU Programming Tips ! Level of Programming (Assembler, Intrinsics, Auto-Vectorization) ! Overlap DMA with computation (double, multiple buffering) ! Dual Issue rate (Instruction Scheduling) ! Design for limited local store ! Branch hints or elimination ! Loop unrolling and pipelining ! Integer multiplies (avoid 32-bit integer multiplies) ! Avoid scalar code ! Choose the right SIMD strategy ! Load / Store only by quadword
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Systems and Technology Group 3/2/2008 Cell Programming Workshop 6 Programming Levels on Cell BE ! Expert level Assembler, high performance, high efforts ! More ease of programming C compiler, vector data types, intrinsics, compiler schedules instructions + allocates registers ! Auto-SIMDization for scalar loops, user should support by alignment directives, compiler provides feedback about SIMDization ! Highest degree of ease of use user-guided parallelization necessary, Cell BE looks like a single processor Trade-Off Performance vs. Effort Requirements for Compiler increasing with each level
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Systems and Technology Group 3/2/2008 Cell Programming Workshop 7 Overlap DMA with computation ! Double or multi-buffer code or (typically) data ! Example for double buffering n+1 data blocks: Use multiple buffers in local store Use unique DMA tag ID for each buffer Use fence commands to order DMAs within a tag group Use barrier commands to order DMAs within a queue
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Systems and Technology Group 3/2/2008 Cell Programming Workshop 8 Start DMAs from SPU ! Use SPE-initiated DMA transfers rather than PPE- initiated DMA transfers, because there are more SPEs than the one PPE the PPE can enqueue only eight DMA requests whereas each SPE can enqueue 16
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Systems and Technology Group 3/2/2008 Cell Programming Workshop 9 DMA Transfers and LS Accesses !
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