4 bit serial adder.rtf - WORKING OF 4 BIT SERIAL ADDER For each succeeding clock pulse the contents of the shift registers A and B shifts from left to

4 bit serial adder.rtf - WORKING OF 4 BIT SERIAL ADDER For...

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WORKING OF 4- BIT SERIAL ADDER For each succeeding clock pulse, the contents of the shift registers A and B shifts from left to right and the Sum bit from the full adder are transferred to the "Sum Register"(as shown in fig). While the carry output from full adder is transferred to the D flip-flop and its output drives the carry input of the adder. Consider the following example. Let the number (A₃A₂A₁A₀) be 0111 and number(B₃B₂B₁B₀) be 0010, stored in shift registers A and B respectively. Also the carry flip-flop has been initially cleared i.e, Cin = 0. First Clock Pulse - Before the first clock pulse, the inputs to the full adder are A₀=1 and B₀ = 0 and Cin=0. Output of the full adder are S = 1 and Cout = 0. When the first clock pulse occurs, the values present in A and B registers shift from left to right by one bit. In addition to this, the sum is transferred to the S₃ of the "Sum Register" and the Cout is transferred to the D flip-flop and its output becomes 0.
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  • Fall '15
  • AZAM
  • Addition, Flip-flop

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