17_Main_Memory_II

17_Main_Memory_II - 1 CSC 4103 - Operating Systems Fall...

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Unformatted text preview: 1 CSC 4103 - Operating Systems Fall 2009 Tevfik Ko ! ar Louisiana State University October 27 th , 2009 Lecture - XVII Main Memory 2 Roadmap Paging Address Translation Scheme Shared Pages Segmentation Address Translation Scheme Shared Segments 16 Paging - noncontiguous Physical address space of a process can be noncontiguous Divide physical memory into fixed-sized blocks called frames (size is power of 2, between 512 bytes and 8192 bytes) Divide logical memory into blocks of same size called pages . Keep track of all free frames To run a program of size n pages, need to find n free frames and load program Set up a page table to translate logical to physical 17 Address Translation Scheme Address generated by CPU is divided into: Page number (p) used as an index into a page table which contains base address of each page in physical memory Page offset (d) combined with base address to define the physical memory address that is sent to the memory unit 18 Address Translation Architecture 19 Paging Example 20...
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17_Main_Memory_II - 1 CSC 4103 - Operating Systems Fall...

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