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# chap11 - Differential Amplifier Model Basic Represented by...

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1 Differential Amplifier Model: Basic Represented by: A = open-circuit voltage gain v id = ( v + -v - ) = differential input signal voltage R id = amplifier input resistance R o = amplifier output resistance Signal developed at amplifier output is in phase with the voltage applied at + input (non-inverting) terminal and 180° out of phase with that applied at - input (inverting) terminal. Differential Amplifier Model: With Source and Load Resistances R L = load resistance R S = Thévenin equivalent resistance of signal source v s = Thévenin equivalent voltage of signal source L R o R L R A + = id v o v • Op amp circuits are mostly DC-coupled amplifiers. Signals v o and v s may have a DC component representing a DC shift of the input away from Q-point. • Op-amp amplifies both DC and AC components. L R o R L R S R id R id R v A + + = = s v o v S R id R id R + = s v id v and A Amplification including source/load = Differential Amplifier Model: With Source and Load (Example) Problem : Calculate voltage gain Given Data : A =100, R id =100k , R o = 100 , R S =10k , R L =1000 Analysis : Ideal amplifier’s output depends only on input voltage difference and not on source and load resistances. This can be achieved by using fully mismatched resistance condition ( R id >> R S or infinite R id and R o << R L or zero R o ). A = open-loop gain (maximum voltage gain available from the device) dB 3 . 38 6 . 82 0 100 100 1000 k 100 k 10 k 100 100 s v o v = = + + = + + = = L R o R L R S R id R id R v A id v o v A = A v A = = id v o v Decibels (dB) Power gain: A P,dB = 10 log A P Current or voltage gain: A i,dB = 20 log A i or A v,dB = 20 log A v This is because P = i 2 R = v 2 /R An increase in i or v by a factor of 10 causes power to increase by a factor of 100. In both cases power increases by 20dB. Ideal Operational Amplifier Ideal op amp is a special case of ideal differential amplifier with infinite gain, infinite R id and zero R o . and – If A is infinite, v id is zero for any finite output voltage. Infinite input resistance R id forces input currents i + and i - to be zero. Ideal op amp has following assumptions: Infinite common-mode rejection, power supply rejection, open-loop bandwidth, output voltage range, output current capability and slew rate Zero output resistance, input-bias currents and offset current, input- offset voltage. A o v id v = 0 id v lim = A Infinite Common-Mode Rejection Changing the input voltages v + and v_ by the same amount has no effect on the output voltage v o . While undesirable, and great effort expended to get rid of it, real op-amps are sensitive to common-mode voltage changes.

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2 Infinite Power Supply Rejection Changing the power supply voltage has no effect on the output voltage v o .
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