ECE230_F10_Lab4_Readme - respectively. 1. Design, simulate,...

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Boise State University Digital Systems Laboratory Electrical and Computer Engineering Department ECE230L Page 1 of 1 Fall 2010 Lab 4: Introduction to FPGA Design Objective: New Design Your boss has been working on a new logic circuit and would like you to do some prototyping work. He has reduced the design to two functions ( s and co ) of the same input variables (ci, x, y) . s(ci, x, y) = m (1,2,4,7) and co(ci, x, y) = m (3,5,6,7) For your design use the following input/output assignments. CO: LD7 S: LD6 CI: SW2 A SW1 B SW0 Also, reflect the current state of the switches (SW2, SW1, SW0) on LED’s (LD2, LD1, LD0)
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Unformatted text preview: respectively. 1. Design, simulate, build (on FPGA), and verify the logic. Report: Record all results in your team report. Some of the important items are: 1. Problem statement 2. The simplified Boolean expressions, 3. Associated truth table, 4. Simplification technique(s) and results, 5. Schematic diagram, 6. Simulation waveform, 7. Results and reflections, and 8. Schematics and simulation waveforms for all implementations. FPGA implementation check-off ______________...
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This note was uploaded on 10/11/2011 for the course ECE 230 taught by Professor Staff during the Fall '08 term at Boise State.

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