ECE230_F10_Lab8_Readme

ECE230_F10_Lab8_Readme - you will also need to make sure...

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Boise State University Digital Systems Laboratory Electrical & Computer Engineering Department ECE230L Page 1 of 1 Fall 2010 Lab 8: Yet Another Arithmetic Unit Lab Objective: At the completion of this laboratory, you will know how signals (data) from multiple sources can be displayed to the seven-segment LEDs, and how to display a negative number. Instruction: Using previous lab project files, you are to design logic circuitry for displaying the source numbers (A and B) and addition/subtraction results to the seven-segment LEDs. The sources and result are to be displayed according to the digit shown in the following figure. Note: Assume A B = Result. If the result is positive, no sign needs to be displayed. If the result is negative, you will need to do something with the result before you can display it. With a negative result,
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Unformatted text preview: you will also need to make sure that the negative sign is displayed to the proper seven-segment digit. If the values for A or B are negative, use the decimal point to signify a negative value adjust the value displayed accordingly. The Result should have the decimal point set to signify an overflow condition. Simulate your design of the module to convert 2’s complement numbers to sign-magnitude format. Download your design to the FPGA. You should use the switches as A (left four switches) and B (right four switches) inputs. As for the addition/subtraction input, use a push button. You will need your Lab 5 (Hex7) and the SSSD module. Lab Report: Clearly and completely describe your design (your design ideas and design decisions), and trade-offs that you have made. A B Negative (-) Result...
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