lecture_Regulator_v2

lecture_Regulator_v2 - Voltage Regulators Hao Jiang for...

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Unformatted text preview: Voltage Regulators Hao Jiang for Engr 353 Variable descriptions Up-case variables with up-case subscripts are DC and large signal variables low-case variables with low-case subscripts are small signal variables Up-case variables with low-case subscripts are large and small signal combined variables 1 Introduction First of all, this subject is important because the voltage regulator is widely used. Second, we need to introduce the concept of line regulation and load regulation to characterize the quality of a voltage regulator. Third, we need to use small signal model to estimate the line regulation and load regulation for the first time in this class. We are going to start with 2 simple examples and then work towards more difficult one. 2 A regulator made of resistors Figure 1: A resistive voltage regulator In Figure 1, we assume the input DC voltage is V IN , the value of the resistor R X and R Y is R X and R Y , respectively. Please also note that I am using Up-case variables with low-case subscripts to describe the input and the output voltage. We are going to look in its output DC voltage V OUT , line and load regulation, and its power consumption. We can assume V IN = 10 V and R X = R Y = 1 k Ω if you really need numbers in the examples. 2.1 The DC output voltage The DC output voltage is: V OUT = R Y R X + R Y × V IN = 5 V (1) I guess that I don’t need to say anything to explain this....
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This note was uploaded on 10/16/2011 for the course ENGR 353 taught by Professor Staff during the Fall '11 term at S.F. State.

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lecture_Regulator_v2 - Voltage Regulators Hao Jiang for...

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