320 winter 07 cockrum

320 winter 07 cockrum - P omona U niversity, P olytechnic S...

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California State Polytechnic University, Pomona rJonert-menf of Electrical anci Computer Engineering vv|/u! ECE 320 Linear Active Circuit Design Spring Quarter 2OO7 Course Instructor a\FF: ^^ UI I IUE Office Phone Hours Qutzzes (9) Midterm Exam (6th week) Final Exam Total points Possible R. H. Cockrum (rhcockrumGcsupomona. edu) J J'AV 909-869-25L0 MW 10: 00am to 11: 4Oam Tu L2:00 to 12:50pm 90 100 Course Title: course objectives: To study smafl signal modeling and rlaqianq r:F qinr-rle s1-acre and mrr'l fi-sfaoe emnlifiers- '*f I9f g D LqYE qIIs ILLUI L! r uqYv Course Textbook: Neamen or Jaeger any edition Prerequisites: Completion of ECE 220 Co-requisite: none Grading: Homework Assignments (9 assignments) 380 Homework is due one week after being handed out - Late work wiIl have Points deducted. Grading is done usinq a curve technique' NO CELL PHONES IN CLASS ! Points may be deducted. No make-up exams will be given' Last day to turn in Late assignments: March 1 ' 2001 ' Exam: Wed., March L4, 2001, L:AOpm to 3:4Opm'
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ECE 320 Outline Week 1 Basic Facts About Amplifrers 1. Waveforms 2. Active versus Passive Devices: Definitions 3. Smail Signal Analysis and Models 4. Amplifiers: a. Types: i. Classifications ii. Configurations b. Efficiency: DC to AC c. Design Parameters i. Techniques ii. AmplifierParameters iii. Transistor parameters Weeks 2-5 Amplifier Design and Analysis 5. Single Stage BJT Class A Design and Analysis 6. Single Stage JFET Class A Design and Analysis 7. Single Stage MOSFET Class A Design and Analysis Week 6 Multiple Stage Amplifier Design and Analysis 8. Multi-Stage Amplifiers-BJT/JFET/MOSFET a. Capacitive Coupling b. Direct Coupling Week 7 R.eal Operational Amplifiers 9. Op Amps: Gain, Offsets, Noise, Bias Currents Week 8 Feedback in Amplifiers 10. Feedback Types: An Overview Week 9 Effects of Capacitance 1 1. Capacitive Filtering: An Introduction Week L0 Frequency Response of Amplifiers 12. Frequency Response: An Introduction a. Bode Plots b. Domains c. Filter Responses d. Circuit Wirine Effects Chapter x : From Neamen textbook. Class notes Chapters 4, 5, 6 &.7 Class notes, 4,6 & 8 notes& 4 notes& 6 notes& 6 4, & 6 Chapter 9,13, & 14 12 Chapter 7 7 Revised 3-28-2005
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Some Design Considerations for Transistor Amplifiers ---------Transistor Family----- BJT JFET EM-MOSFET DM-MOSFET Parameter Operating Mode Enhancement Depletion Enhancement Depletion Operator Current Voltage / Voltage Voltage Noise Level High Low VerY Low Power Levels Low to High Low to Moderate Low to Moderate Low to Moderate Failure Cause Excessive Ie Forward Biased Gate Oxide Breakdown Oxide Breakdown Switching Speed Low to High Low to High Low to Moderate Low to Moderate r- .\ U,ii tu r..irr I t tl r t t-lt\. Input Impedance Low to Moderate Moderate to High Moderate to Very High High to,Very High t ,,t i a.' t,o tl ( ol\' Cost Low to Moderate Moderate Low to Moderate Moderate to High Availability Low to High Low to High Low to Moderate Very Low -t^l"'.hot \\.,.\^ M,. l- -.. i- L.- Lot- l,okctro^ t1l'1 \\t$ h''l.-top-;o t'tl$
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Ilr ri c" \ l4wlelvle!q 0.0001- 1 uf Medium- rtectrotytic_ lTe4elum - iP 0.1 - 43,000uf 160uf 0.1pf-100uf Medium Very Low
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3.0235_ 50 SHEETS - 5 SQUARES 3-0236_ 1OO SHEETS _ 5 SQUARES 3.0237
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320 winter 07 cockrum - P omona U niversity, P olytechnic S...

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