Chapter1 - A Programmer’s View of View Computer...

Info iconThis preview shows page 1. Sign up to view the full content.

View Full Document Right Arrow Icon
This is the end of the preview. Sign up to access the rest of the document.

Unformatted text preview: A Programmer’s View of View Computer Architecture Computer Professor Kent Wilken EEC70 Fall 2010 1 High-Level Language Abstraction ECS30 View The compiler and computer together appear as a ‘black box’ that executes high-level language level instructions instructions area_triangle = (width area_triangle * height) / 2; (ECS 30) height) (ECS compiler computer 1.237 2 Assembly/Machine Language Abstraction EEC70 View EEC70 exposes the external external behavior of the compiler and behavior processor processor area_triangle := (width area_triangle compiler * height) / 2; (ECS142) The internal workings of the compiler and the processor are studied in ECS142 and EEC170 EEC170 (EEC70) assembler Compiler and processor remain black boxes remain lw r15, 0(r2) lw r16, 0(r2) mult r16,r15 mult (EEC70) EEC70 0001 0101 1100 1110 0001 1101 1100 0000 1001 1010 0101 0010 1101 processor (EEC70) (EEC170) 1.237 3 Making Software Run Fast Classic Computer Engineering Problem Algorithms Programming Programming Languages Languages Compilers ECS 122A ECS 30 / 40 / 140A ECS ECS 142 ECS Computer Architecture EEC 70 / 170 / 171 EEC 170 Logic Design EEC 180A / 180B Transistor Design EEC 118 4 Course Coverage We’ll cover the first ten chapters of our text: We 1. Abstractions 2. SAL – A Simple Abstract Language SAL 3. Number Systems 4. Data Representation 5. Arithmetic and Logical Operations 6. Floating Point Arithmetic 7. Data Structures 8. Registers and MIPS Assembly Language (MAL) 9. Procedures 10.The Assembly Process 5 Teaching Staff Instructor Instructor • Kent Wilken <[email protected]> Office hours: Tuesday 1-3 PM 2119 Kemper Hall Teaching Assistants Teaching • Emmanuel Adeagbo <[email protected]> • Faisal Khan <[email protected]> Office hours: TBA Office TBA 6 About Me BS, MS: Stanford University BS, Industry: Hewlett Packard Industry: PhD: Carnegie Mellon University PhD: Academic: UC Davis 1990-present Academic: Teaching: • Computer Architecture: EEC70, EEC170, EEC171, Computer EEC70 EEC170, EEC172, EEC270 EEC172, • Compiler Optimization: ECS243 Compiler ECS243 My first “PC” • • • • 1973: DEC PDP-8 4Kbytes memory 1 MHz clock cycle $10,000 7 Electronic Resources Class webpage: SmartSite Email: Email: • Programming/homework assignment questions email one or both TAs • Lecture, textbook or administrative questions Lecture, email instructor <= 24-hour response (except weekends) <= hour 8 Grading Exams: • Midterm: • Final: 20% 20% 40% 40% Homework: Homework: • Programming assignments: • Written assignments: Participation: answering/asking Participation: questions 20% 10% 10% 5% (bonus points) Hand In: Hand • Programming assignments: SmartSite ‘attachment’ Programming upload • Written assignments: due at start of class Late assignments: -10%/day until solutions are posted 9 Assignments One programming assignment most weeks, due Thursday weeks, One short written assignment some weeks, due Tuesday weeks, 10 Programming Assignments Programming assignments are group group projects, where a group is either two or projects, one students one Students are responsible for finding a group partner. E-mail the instructor if you would like a mail partner but are having difficulty finding one 11 Academic Honor Code Only turn in your own original work Only Honor code violators will be reported to Student Judicial Affairs Student 12 Chapter1: Abstraction 13 High Level Language Abstraction Programmer need not worry about details of the machine language or processor design the Increases programmer productivity, program reliability reliability • HLL statement typically maps to about 4 HLL statement typically machine instructions instructions • High level languages are easier to read and High understand, hence fewer errors understand, 14 Abstraction Example High level language statements may have unlimited operands. Machine language instructions usually have at most two operands have • HLL statement A = B+C+D+E becomes (within the HLL B+C+D+E becomes compiler): compiler): T1 = B+C T2 = D+E A = T1+T2 Ti is called a compiler-generated temporary is compiler generated variable variable 15 Computer Architecture A computer architecture specifies the computer specifies interface between the hardware and software in a computer system software Software Compiler/ Assembler 0001 0101 1100 1110 1101 1100 0000 1001 1010 0101 0010 1101 Hardware processor 16 Instruction Set Architecture A computer’s instruction set architecture computer instruction specifies the set of instructions specifies (operations) that are built into the hardware, including hardware, • The program transformation each instruction The produces produces • The instruction’s binary format Understanding the nature of instruction set architecture is an important objective of EEC70 of 17 MIPS Architecture The architecture used in EEC70 is called MIPS MIPS • Microprocessor without Interlocking Pipeline Stages (see icroprocessor nterlocking ipeline tages EEC170 for meaning) EEC170 MIPS is widely used in embedded systems MIPS is embedded (electronic device with internal processor) • Video Recorders (TiVo) • Digital Cameras (Canon) • Wireless access points (Linksys) • High Definition TVs (Sony) • DSL/Cable Modems (Motorola) • Laser Printers (Hewlett Packard) • Video Game Consoles (Sony PS2) • Data Projectors (Epson) • Internet Routers (CISCO) 18 Mips Architecture (cont.) MIPS has a simple machine language, easy to understand and learn fundamental ideas fundamental MIPS architecture is used in later EEC classes (e.g., 170) so you don’t need to classes need learn a new architecture learn 19 SPIMSAL Simulator We will use the Windows SPIMSAL Simulator SPIMSAL Simulator to run MIPS programs MIPS • The simulator can be downloaded from the class The SmartSite page SmartSite Under Windows SPIMSAL must be installed in a file path that does not include a space character, e.g., not: character, C:\Program Files\SPIMSAL C:\Documents and Settings\Kent\My Documents\SPIMSAL maybe: C:\SPIMSAL 20 Intel x86 Architecture x86 architecture has complex machine language, more difficult to learn language, • Actually, MIPS-like instructions are used like inside x86 processors, called micro ops micro x86 machine code 0001 0101 1100 1110 1101 1100 0000 1001 translate x86 Processor 1101 01010 1010 0101 1100 1010 1010 1010 0011 1110 micro ops 21 Representation Computers represent everything as binary digits {0,1}, bits digits {0,1}, bits “for ( i := 1; i < n; i++)” “3.07 x 1029” “Hello” “0110101010100100101010...” “1110101110010111011001010...” “101001100110001010101...” “1101111010101011111010100...” We will study how computers represent programs and data in binary programs 22 Computer Basics Processor and main memory are primary computer components computer Main memory stores both instructions instructions and data and data code Main Memory Processor data 23 Cache Memory Processors contain small, fast on-chip Processors chip memories called caches that can be caches that specialized for instructions and data specialized code Processor CPU Main Memory data 24 Computer Basics Instruction Memory CPU Data Memory Instruction execution sequence: Instruction 1. Fetch instruction 2. Fetch operands 3. Compute result 4. Store result A: Which instruction should be executed? B: Which operands should be used? C: Where should the result be stored? 25 Computer Basics Instruction Memory CPU Data Memory Instruction execution sequence: Instruction 1. Fetch instruction 2. Fetch operands 3. Compute result 4. Store result A: Which instruction should be executed? B: Which operands should be used? C: Where should the result be stored? 26 Computer Basics Instruction Memory CPU Data Memory Instruction execution sequence: Instruction 1. Fetch instruction 2. Fetch operands 3. Compute result 4. Store result A: Which instruction should be executed? B: Which operands should be used? C: Where should the result be stored? 27 Computer Basics Instruction Memory CPU Data Memory Instruction execution sequence: Instruction 1. Fetch instruction 2. Fetch operands 3. Compute result 4. Store result A: Which instruction should be executed? B: Which operands should be used? C: Where should the result be stored? 28 Computer Basics Instruction Memory CPU Data Memory Instruction execution sequence: Instruction 1. Fetch instruction 2. Fetch operands 3. Compute result 4. Store result A: Which instruction should be executed? A: B: Which operands should be used? B: C: Where should the result be stored? C: 29 Main Memory An array of storage cells An Each cell is read or written using its numeric address numeric • 32-bit processors can have as many as 232 (~4 (~4 billion) memory locations 0 1 2 n-1 30 Generic Machine Instruction An instruction is stored in a consecutive sequence of memory cells: sequence i operand 1 address i+1 operand 2 address i+2 i+3 operation result address The instruction contains the operand and result addresses result • Answers questions B and C 31 Program Counter The program counter (PC) inside the program (PC) processor points to instruction to be executed executed • After instruction is executed, PC is updated After based on the type of instruction based 0 1 2 Processor PC n-1 32 Labels and Addresses How do we know the memory address of a variable? variable? • When variables are declared, they are When assigned memory addresses by the compiler or the assembly language programmer: or int A, B, C; A = B+C; Main Memory 0 1 2 A B C Instruction 1 i+1 2 i+2 i+3 n-1 i ADD 0 33 Instruction Sequencing Usually when current instruction completes, the next instruction to execute is the one that immediately follows in memory immediately At the end of the current instruction execution processor updates PC: PCnew = PCcurrent+4 processor i operand 1 address PCcurrent i+1 operand 2 address i+2 i+3 operation result address i+4 operand 1 address PCnew i+5 operand 2 address i+6 i+7 operation result address 34 Branches Sometimes we do not want sequential instruction execution, e.g., IF-ELSE or loops instruction Branch instructions allow execution of Branch instructions sequential instruction or instruction at branch or instruction target, based on result of a comparison target, A B Compare A/B Branch Target Addr Comparison may be >, <, =, <=, >=, etc. Comparison Instruction result is stored to PC, not memory. Instruction Either PC+4 or Branch Target 35 Complete Instruction Execution Complete Sequence Sequence 1. 2. 3. 4. 5. 6. Instruction Fetch Program Counter Update (PC=PC+4) Instruction Decode Operand Load Execute Operation Store results (memory or PC) 36 ...
View Full Document

This note was uploaded on 10/07/2011 for the course ECON 1A taught by Professor Modjtahedi during the Fall '08 term at UC Davis.

Ask a homework question - tutors are online