cs313-2006-t2-problemset9

# cs313-2006-t2-problemset9 - memory access(i.e to the page...

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CPSC 313, Winter 2006 - Term 2 Problem Set #9 Assigned: April 2 Due Wednesday, April 11, 13:00 pm (no grace period) 1. Textbook 10.11 2. Textbook 10.12 3. Textbook 10.13 4. Consider a virtual-memory system with the following parameters PTBR = physical address of page table base PTE[i] = page table entry at physical address i (i.e., the byte address of PTE) PTE[i] is a struct with these ﬁelds: PFN, S (system), W (writeable), P (present) one-level page table 32-bit virtual addresses 4-KB page size VA = virtual address VA is a struct with these ﬁelds: VPN and PO List the physical address of every memory access required to complete a read from a user-mode program to virtual address 0x8063472 (i.e., 0000 1000 0000 0110 0011 0100 0111 0010) (in terms of VA, PTE[i] and PTBR), assuming that there are no cache hits in any cache. Be sure to list every

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Unformatted text preview: memory access (i.e., to the page table AND the target data itself). Brieﬂy explain each answer and list the checks that determine whether the read access is valid and permitted. You may use the notation FOO[i. .j] to be the number formed by selecting bits i through j from FOO as bits i-j through 0 of the result, where bit 0 is the lowest order bit. For example, 101101[4. .2] = 011 = 310. 1 5. Repeat question 4, with the following changes to the VM system • two-level page table with 1024 entries in the level-one page table • PDE[i] = page directory entry at physical address i with same ﬁelds as PTE[i] 6. Compare the replacement mechanisms of set-associative caches and virtual memory by describing the algorithm each uses and justifying why this algorithm is a good choice for that problem, but not for the other. 2...
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## This note was uploaded on 10/09/2011 for the course CPSC 344 taught by Professor Karen during the Fall '10 term at UBC.

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cs313-2006-t2-problemset9 - memory access(i.e to the page...

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