EE203-SUNYBuffalo-33-Chapter05-01

EE203-SUNYBuffalo-33-Chapter05-01 - SMALL for Big Things...

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Unformatted text preview: SMALL for Big Things University at Buffalo SMALL for Big Things University at Buffalo nanobioSensors & MicroActuators Learning Lab The State University of New York nanobioSensors & MicroActuators Learning Lab The State University of New York EE 203 Circuit Analysis 2 Lecture 33 Chapter 5.1 Operational Amplifier Terminals Kwang W. Oh, Ph.D., Assistant Professor SMALL (nanobioSensors and MicroActuators Learning Lab) Department of Electrical Engineering University at Buffalo, The State University of New York 215E Bonner Hall, SUNY-Buffalo, Buffalo, NY 14260-1920 Tel: (716) 645-3115 Ext. 1149, Fax: (716) 645-3656 E-mail: kwangoh@buffalo.edu, http://www.SMALL.Buffalo.edu EE 203 Circuit Analysis 2 | Spring 2008 | Prof. Kwang W. Oh | EE@SUNY-Buffalo OP Amp (Operational Amplifier) OP Amp is referred to as operational because it was used to implement the mathematical operations of Integration, Differentiation, Addition, Sign Differentiation Addition Sign changing, Scaling, and more applications. The terminals of primary interest 3. Noninverting input 2. Inverting input 6. Output 7. Positive power supply (V+ ) 4. Negative power supplly (V – ) 8. NC (no connection) 1. & 5. Offset null no concern Lecture 33 | Chapter 5 | 1/4 | 1/9 EE 203 Circuit Analysis 2 | Spring 2008 | Prof. Kwang W. Oh | EE@SUNY-Buffalo SMALL for Big Things University at Buffalo SMALL for Big Things University at Buffalo nanobioSensors & MicroActuators Learning Lab The State University of New York nanobioSensors & MicroActuators Learning Lab The State University of New York Lecture 33 | Chapter 5 | 1/4 | 2/9 OP Amp EE 203 Circuit Analysis 2 Lecture 33 Chapter 5.2 Terminal Voltages, Currents Terminals Terminals 3. (+) Noninverting input 2. ( –) Inverting input 6. Output 7. (V+) Positive power supply (V+) 4. (V –) Negative power supply (V –) EE 203 Circuit Analysis 2 | Spring 2008 | Prof. Kwang W. Oh | EE@SUNY-Buffalo Kwang W. Oh, Ph.D., Assistant Professor SMALL (nanobioSensors and MicroActuators Learning Lab) Department of Electrical Engineering University at Buffalo, The State University of New York 215E Bonner Hall, SUNY-Buffalo, Buffalo, NY 14260-1920 Tel: (716) 645-3115 Ext. 1149, Fax: (716) 645-3656 E-mail: kwangoh@buffalo.edu, http://www.SMALL.Buffalo.edu Lecture 33 | Chapter 5 | 1/4 | 3/9 EE 203 Circuit Analysis 2 | Spring 2008 | Prof. Kwang W. Oh | EE@SUNY-Buffalo Lecture 33 | Chapter 5 | 1/4 | 4/9 SMALL for Big Things University at Buffalo SMALL for Big Things University at Buffalo nanobioSensors & MicroActuators Learning Lab The State University of New York nanobioSensors & MicroActuators Learning Lab The State University of New York Terminal Voltages and Currents Voltage Transfer Characteristic of an OP Amp A positive supply voltage (VCC) is connected between V+ and the common node. positive A negative supply voltage ( –VCC) is connected between V – and the common node. vp, vn, vo All the current reference directions are into the terminals of the OP amp in, ip, io, ic+, ic– EE 203 Circuit Analysis 2 | Spring 2008 | Prof. Kwang W. Oh | EE@SUNY-Buffalo The The output voltage is a function of the difference between the input voltages (vp – vn). The output voltage = the difference (vp – vn) in its input voltages times the ou multiplying constant, or gain A Linear region: the output voltage is a linear function of the input voltages, when when |vp – vn| is small Positive saturation & negative saturation: the output voltage is no longer a linear function of the input voltages. Lecture 33 | Chapter 5 | 1/4 | 5/9 EE 203 Circuit Analysis 2 | Spring 2008 | Prof. Kwang W. Oh | EE@SUNY-Buffalo SMALL for Big Things University at Buffalo SMALL for Big Things University at Buffalo nanobioSensors & MicroActuators Learning Lab The State University of New York nanobioSensors & MicroActuators Learning Lab The State University of New York Constraint Input Voltage Constraint for Ideal OP Amp A constraint is imposed on the input voltages, vp and vn and The constraint is based on typical numerical values for VCC and A. Typical OP Amp Recommended dc power supply voltages seldom exceed 20 V The gain, A, is rarely less than 104. –VCC ≤ A(vp – vn) ≤ VCC –20 ≤ 104(vp – vn) ≤ 20 |vp – vn| ≤ 20/104 = 2 mV Note that the positive and negative power supply voltages do not have to be equal in magnitude. For example, iif V+ = 15 V and V – = –10 V, then –10 V ≤ v0 ≤ 15 V f 15 10 15 Be aware also that the value of A is not constant under all operating conditions. For now, however, we assume that it is. EE 203 Circuit Analysis 2 | Spring 2008 | Prof. Kwang W. Oh | EE@SUNY-Buffalo Lecture 33 | Chapter 5 | 1/4 | 6/9 Lecture 33 | Chapter 5 | 1/4 | 7/9 Input voltage constraint for ideal OP Amp Infinite A |vp – vn| ≤ 20/104 = 2 mV |vp – vn| ≤ 20/∞ = 0 Virtual short condition Negative feedback: a signal is fed back from the output terminal to the inverting input terminal Negative feedback the input voltages difference (↓) the output voltage (↓) OP Amp operates in its linear region. EE 203 Circuit Analysis 2 | Spring 2008 | Prof. Kwang W. Oh | EE@SUNY-Buffalo Lecture 33 | Chapter 5 | 1/4 | 8/9 SMALL for Big Things University at Buffalo nanobioSensors & MicroActuators Learning Lab The State University of New York Input Current Constraint for Ideal OP Amp Input current constraint for ideal OP Amp Infinite equivalent input resistance The equivalent resistance seen by the input terminals of the op amp is very large, typically 1 MΩ or more. Even though the current at the input terminal is negligible, there may still be appreciable current at the output terminal EE 203 Circuit Analysis 2 | Spring 2008 | Prof. Kwang W. Oh | EE@SUNY-Buffalo Lecture 33 | Chapter 5 | 1/4 | 9/9 ...
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