L9+Data+Hazards - Topic 9 Hazards & Exceptions...

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Topic 9
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Hazards ± Situations that prevent starting the next instruction in the next cycle ± Structure hazards ± A required resource is busy ± Data hazard ± Need to wait for previous instruction to complete its data read/write ± Control hazard ± Decision on control action depends on previous instruction
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Structure Hazards ± Conflict for use of a resource ± If common memory for program and data ± Load/store requires data access ± Instruction fetch would have to stall for that cycle ± Would cause a pipeline “bubble” ± Hence, pipelined datapaths require separate instruction/data memories ± separate instruction/data caches (Harvard) ± Common low-level memory (Von Neumann)
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Data Hazards in ALU Instructions ± Consider this sequence: sub $2 , $1,$3 and $12, $2 ,$5 or $13,$6, $2 add $14, $2 , $2 sw $15,100( $2 )
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Data Dependencies OK dependencies
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Data Hazards ± An instruction must be delayed ± If an instruction depends on completion of data access by a previous instruction ± Example add $s0 , $t0, $t1 sub $t2, $s0 , $t3
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Forwarding (aka Bypassing) ± Data hazard can be solved with Forwarding ± To avoid delaying an instruction ± Use result when it is computed ± Don’t wait for it to be stored in a register ± Requires extra connections in the datapath
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How to detecting data hazard for forwarding? Forwarding
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L9+Data+Hazards - Topic 9 Hazards & Exceptions...

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