Unformatted text preview: for I/O. How is the synthesizer informed of these pin assignments so the FPGA can be properly programmed? Pin assignments are provided by the user either manually during the synthesis process or via a user constraint file. 4. (2 points) How do ports in modules differ from ports in tasks? Ports in tasks are used to pass values; ports in modules are signals used for interfacing. 5. (2 points) How do you make a task re-entrant? After the keyword “task” you put the keyword “automatic”...
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- Spring '11
- Input/output, user constraint file, pin assignments, Time-stamped switching information