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Unformatted text preview: process? FPGA prototypes allow software (that ultimately will run on the ASIC) to be developed, tested and validated before the ASIC hardware design is finished. This greatly shortens the ASIC design time. 3. What is design flattening? Design flattening is the removal portions of a design hierarchy by the synthesizer to promote optimization....
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This note was uploaded on 10/16/2011 for the course ECE 351 taught by Professor Greenwood during the Spring '11 term at Portland State.
- Spring '11