fw01 - EE 320 Winter 2001 Prof. Clymer Final Exam March 14,...

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Unformatted text preview: EE 320 Winter 2001 Prof. Clymer Final Exam March 14, 2001 1 hour 50 minutes Please write out the EE Honor Code Pledge: No aid given, received or observed, on this exam booklet and sign your name before turning in your exam. EE 320, Final ExamMarch 14, 2001 2 1.) (20 pts) For the CMOS logic circuit shown below, explain the logic operation of the circuit. Intersecting lines in the schematic are only electrical connections if there are black dots drawn at the intersections. Treat PMOS and NMOS transistors as voltage controlled switches using the correct gate voltage rule for each type of transistor. Express the truth table for the logic function. V DD M 1 M 2 M 3 M 5 M 4 M 6 V A V C V B V o C Circuit for Prob. 1 EE 320, Final ExamMarch 14, 2001 3 (this page left blank for calculations) EE 320, Final ExamMarch 14, 2001 4 2.) (25 pts) For the flip-flop circuit shown below, before the first rising edge of the A waveform, Q 1 = 0 and Q 2 = 1. Complete the timing diagram shown below= 1....
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fw01 - EE 320 Winter 2001 Prof. Clymer Final Exam March 14,...

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