22-InstructionEncoding - Instruction encoding Weve already...

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Instruction encoding 1 Instruction encoding We’ve already seen some important aspects of processor design. A datapath contains an ALU, registers and memory. Programmers and compilers use instruction sets to issue commands. Now let’s complete our processor with a control unit that converts assembly language instructions into datapath signals. Today we’ll see how control units fit into the big picture, and how assembly instructions can be represented in a binary format. On Wednesday we’ll show all of the implementation details for our sample datapath and assembly language.
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Instruction encoding 2 Review: Datapath Recall that our ALU has direct access only to the register file. RAM contents must be copied to the registers before they can be used as ALU operands. Similarly, ALU results must go through the registers before they can be stored into memory. We rely on data movement instructions to transfer data between the RAM and the register file. D data Write D address A address B address A data B data Register File WR DA AA BA Q D1 D0 S RAM ADRS DATA CS WR OUT MW +5V A B ALU F Z N C V FS FS MD S D1 D0 Q Constant MB
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Instruction encoding 3 Block diagram of a processor The control unit connects programs with the datapath. It converts program instructions into control words for the datapath, including signals WR, DA, AA, BA, MB, FS, MW, MD. It executes program instructions in the correct sequence. It generates the “constant” input for the datapath. The datapath also sends information back to the control unit. For instance, the ALU status bits V, C, N, Z can be inspected by branch instructions to alter a program’s control flow. Control Unit Datapath Control signals Status signals Program
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Instruction encoding 4 A specific instruction set The first thing we must do is agree upon an instruction set. For our example CPU let’s stick with the three-address, register-to -register instruction set architecture introduced in the last lecture. Data manipulation instructions have one destination and up to two sources, which must be either registers or constants. We include dedicated load and store instructions to transfer data to and from memory. Next week, we’ll learn about different kinds of instruction sets.
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Instruction encoding 5 From assembly to machine language Next, we must define a machine language , or a binary representation of the assembly instructions that our processor supports. Our CPU includes three types of instructions, which have different operands and will need different representations. Register format instructions require two source registers. Immediate format instructions have one source register and one constant operand. Jump and branch format
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22-InstructionEncoding - Instruction encoding Weve already...

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