Lec-06_Dynamic-Power-a

Lec-06_Dynamic-Power-a - EE M216A .:. Fall 2010 Lecture 6...

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EE M216A .:. Fall 2010 Lecture 6 Dynamic Power Prof. Dejan Markovi ć ee216a@gmail.com ± Crucial for Portable Applications Determines battery lifetime Increased amount of computation The Importance of Power Awareness ± Crucial for High Performance Applications Determines cooling and energy costs Many designs today are power limited Still need maximum performance D. Markovic / Slide 2 EEM216A .:. Fall 2010 Lecture 6: Dynamic Power | 2
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The Power Challenge ± Technical specs 12,240 Cell chips 6,562 AMD Opteron chips 98 TB of memor IBM RoadRunner [2008] ± Top supercomputer (PFlop) 122400 core 98 TB of memory 278 racks (5,200 sq. ft) 55 miles of fiber optic cable 500,000 lbs, 2.35 MW 437 M calculations / W ± Future data centers 1000 PFlops (~2015) D. Markovic / Slide 3 122400 cores PowerXCell 8i 3.2 GHz/ Opteron DC 1.8 GHz 1,375,776 GFlops (peak) ± $100M EEM216A .:. Fall 2010 Climate modeling Human genome science Limited (today) to ~20 MW by power distribution Lecture 6: Dynamic Power | 3 Where Does the Power Go? Courtesy: P. Franzon, NCSU Power Delivery Computation Cooling (AC) 10 MW D. Markovic / Slide 4 EEM216A .:. Fall 2010 Memory Storage Lecture 6: Dynamic Power | 4
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Where Does the Power Go? Courtesy: P. Franzon, NCSU Power Delivery Computation Cooling (AC) 10 MW 4.7 MW 2 2 MW MW 1 MW 33% 47% 20% 2 2 MW MW D. Markovic / Slide 5 EEM216A .:. Fall 2010 Memory Storage 0.3 MW Lecture 6: Dynamic Power | 5 It is not just Computation ± Power distribution losses in a typical data center Source: Intel D. Markovic / Slide 6 EEM216A .:. Fall 2010 40% 50% of power is lost just in power delivery! Courtesy: P. Franzon, NCSU Lecture 6: Dynamic Power | 6
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Memories ± DDR2 energy budget Total energy/access ~ 550 pJ / bit 512Mb (8x4Mx16) XDR DRAM ± Energy to read a DRAM cell ~ 30 fJ ± Efficiency = 1/20,000 i.e. 0.005% D. Markovic / Slide 7 Courtesy: P. Franzon, NCSU EEM216A .:. Fall 2010 Lecture 6: Dynamic Power | 7 Computation ± FP Multiply in 45 nm technology: 45 pJ/FLOP ± /l i 4 5 R I S C pJ/cycle in a 45 nm RISC processor 1500 pJ/cycle ± Computation is 3% efficient (at best – ignores “overhead” instructions) D. Markovic / Slide 8 Courtesy: P. Franzon, NCSU EEM216A .:. Fall 2010 Lecture 6: Dynamic Power | 8
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Putting it All Together ± For every 1 MJ of energy going into a data center 15 kJ goes into core computation (1.5%) 5 J goes into accessing memory cells ± The rest is “wasted” 3% × 1/3 (delivery and cooling) × 1/2 (distribution) = 0.5% of the total power is used for computations! ± On current scaling trends, a 1000 PetaFlop machine would D. Markovic / Slide 9 require 80 MW of power just for the computer 240 MW of total power (including delivery) Courtesy: P. Franzon, NCSU EEM216A .:. Fall 2010 Lecture 6: Dynamic Power | 9 1. Know your enemy: Power consumption in CMOS 2 Leakage is here to stay Outline 2. 3. Power and performance are tightly coupled and have to be jointly optimized 4. Principles of Power Minimization D. Markovic / Slide 10 EEM216A .:. Fall 2010 Lecture 6: Dynamic Power | 10
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Where does power go in CMOS?
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Lec-06_Dynamic-Power-a - EE M216A .:. Fall 2010 Lecture 6...

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