chap3-090919v4 - CHAPTER 3 Addressing Modes CHAPTER 3.1...

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Unformatted text preview: CHAPTER 3 Addressing Modes CHAPTER 3.1 Data­Addressing Modes 3.1 Data­Addressing Modes • MOV AX, BX; AX<­­­­BX, AX­­ destination, BX­­source • 8 addressing modes (suppose DS=1000H, EBX=00000300H, SI=0200H, variable ARRAY’s offset=1000H) – 1. Register addressing: mov ax, bx – 2. Immediate addressing: mov CH,3AH – 3. Direct addressing: mov [1000H], AX • <==> mov mysum, AX • destination memory addr.: DS*10H+1000H=11000H • [11000]<­­­AX • i.e. [11000]<­­­AL, [11001]<­­­AH – 4. Register indirect addressing: mov [BX] , CL • DS*10H+BX=10000+0300H =10300H • [10300]<­­­CL – 5. Base­plus­index addressing: mov [BX+SI],BP • DS*10H+BX+SI=10000+0300+0200H =10500H • [10500] <­­­ BP – 6. Register relative addressing: mov CL,[BX+4] • DS*10H+BX+4=10000+0300+4H =10304H • CL <­­­ [10304] – 7.Base relative­plus­index addressing: mov ARRAY[BX+SI], DX • <==> mov 1000[BX+SI], DX <==> mov [BX+SI+1000], DX • DS*10H+ARRAY+BX+SI=10000+1000+ 0300+0200H =11500H • [11500] <­­­ DX – 8. scaled­index addressing: mov [EBX+2*ESI+20H], AX • offset=EBX+ESI*2+20H=0300+0200*2H+20H =720H • suppose data segment is at 100000H, [100720] <­­­ AX 1. Register addressing 1. Register addressing • Format: MOV AX, reg • e.g. MOV AX, BX; ADD ECX, EBP • reg: – 8­bit reg: AL,AH,BL,BH,CL,CH,DL,DH – 16­bit reg: AX,BX,CX,DX,SP,BP,SI,DI – 32­bit reg: EAX,EBX,ECX,EDX,ESP,EBP,ESI,EDI TABLE 3­1 TABLE 3­1 2. Immediate addressing 2. Immediate addressing TABLE 3­2 B ‘A’=31H, ‘B’=32H, MOV AX, ‘AB’ <==> AL<­­31H, AH<­­32H <==> AX<­­3231H • Each statement in a program consists of 4 parts: – label: must begin with a letter or @, $, _, ? • in data segment: variable name • in code segment: lable – opcode – operand: • e.g. 23H • e.g. CX,200 – comment 3. Direct addressing 3. Direct addressing • MOV AL, COW; Suppose variable COW’s offset addr=1234H • <==> MOV AL, [1234H] ; AL<­­­ [DS*10H+1234H] • Instruction format: – op­code operand, operand • e.g. add ax, [bx+3]; mov sp, [si­32] – op­code operand • e.g. inc array[si] • EA (effective address) : is operand’s offset addr, it may contain up to 4 parts: – displacement: a 8­bit, 16­bit or 32bit number, it is not a immediate number, but an address. – base addr: bx or bp in real mode; EAX,EBX,ECX,EDX,EBP,ESI,EDI in protected mode – index addr: si or di in real mode; EAX,EBX,ECX,EDX,EBP,ESI,EDI in protected mode – scale factor: 1,2,4 or 8 • So EA = base + index * scale­factor + displacement • EA = base + index * scale­factor + displacement – suppose variable array’s offset is 80h, ebx=100h,ecx=200h – e.g. add cx, array[ebx*4+ecx­10h] • displacement=80h­10h=70h • base=200h • index=100h • EA=200+100*4+70h=670h • The SMALL model allows one data segment and one code segment • .STARTUP statement also loads DS with the segment address of data segment • .STARTUP statement is equal to following instructions: MOV DX, 0B53H ; 0B53 will change to other value in other environment MOV DS, DX MOV BX, SS SUB BX, DX SHL BX,4 CLI MOV SS, DX ADD SP, BX STI • .EXIT statement is equal to following instructions: MOV AH, 4CH INT 21H 4. Register indirect addressing 4. Register indirect addressing • format: MOV AX, [reg] • reg in real mode – BP, BX, SI, DI – e.g. ADD CX, [BP] • reg in protected mode: – EAX,EBX,ECX,EDX,EBP,ESI,EDI – e.g. mov [ECX], 1234H • Note: data addressed by BP,EBP,SP,ESP are located in the stack segment by default. 5. Base­plus­index addressing 5. Base­plus­index addressing • format: MOV DX, [base­reg + index­reg] • in real mode – Base­reg. : BX, BP – index­reg.: SI, DI – e.g. MOV CX, [BX+DI] • in protected mode – Base­reg and index­reg: any two 32­bit reg except ESP. • i.e., EAX,EBX,ECX,EDX,EBP,ESI,EDI • Fig. 3­8 MOV DX, [BX+DI], DS=0100H,BX=1000H, DI=0010H • ADDR.=01000+1000+10=02010H, DX<­­­­[02010H] • Locating Array Data Using Base­plus­index Addressing – BX<­­­­ array’s base address – DI<­­­­ array element number to be accessed. – e.g. .model small .data sum db 0 myarray db 16 dup(?) .code .startup mov bx, offset myarray ; bx <­­­­ 1 mov di, 0 mov cx, 16 mov ax, 0 again: add al, [bx+di] ; add 16 elements of myarray inc di loop again ; loop 16 times mov sum, al ...... 6. Register relative addressing 6. Register relative addressing • Format: MOV AX, [REG+1000H] – REG in real mode: BX, BP, SI, DI – REG in protected mode: EAX,EBX,ECX,EDX,EBP,ESI,EDI • e.g. MOV AL,[DI­2]; ADD, ARR1[DI+20] 7. Base relative­plus­index addressing 7. Base relative­plus­index addressing • format: MOV DX, disp [base­reg + index­reg] – disp: displacement – e.g. MOV DX, 200h [BP+SI] – e.g. MOV DX, MyArray [EAX+ECX­8] • here displacement = offset of MyArray ­ 8 • in real mode – Base­reg. : BX, BP – index­reg.: SI, DI – e.g. MOV CX, [BX+DI] • in protected mode – Base­reg and index­reg: any two 32­bit reg except ESP. • i.e., EAX,EBX,ECX,EDX,EBP,ESI,EDI • MOV AX, [BX+SI+100H] – Suppose: BX=0020H, SI=0010H, DS=2000H – then EA=20+10+100H=130H – AX <­­ [20130H] 8. scaled­index addressing 8. scaled­index addressing • available only in protected mode. • format: MOV DX, disp [base­reg + index­reg*scale­factor] – disp: displacement – Base­reg and index­reg: any two 32­bit reg except ESP. • i.e., EAX,EBX,ECX,EDX,EBP,ESI,EDI – scale factor: 1,2,4 or 8 • EA = base + index * scale­factor + displacement – suppose variable array’s offset is 80h, ebx=100h,ecx=200h – e.g. add cx, arrar[ebx*4+ecx­10h] • displacement=80h­10h=70h • base=200h • index=100h • EA=200+100*4+70h=00000670h 3.2 Program Memory­addressing Modes 3.2 Program Memory­addressing Modes • JMP and CALL instructions consist of three forms – direct program memory­addressing – relative program memory­addressing – indirect program memory­addressing 3.2.1 Direct Program Memory Addressing • It is Inter­segment jump or call. • e.g. ..... label: add ax, 2 code segment 1 ..... jmp far ptr label1 ..... code segment 2 Figure 3­14 The 5­byte machine language version of a JMP [10000H] instruction Figure 3­14 The 5­byte machine language version of a JMP [10000H] instruction • jmp far ptr label1 <==> jmp far ptr 1000:0000 • call far ptr label1 3.2.2 Relative Program Memory Addressing • It is intra­segment jump or call, e.g. – jmp short ptr label2 ; 8­bit displacement, ­128­­­­+127 – jmp near quest ; 16­bit displacement in 8086, ­32K­­+32K – jmp near quest ; 32­bit displacement in 80386 or above • instruction format: op­code 8­,16­,32­bit displacement JMP [2] 有有 JMP 0004 有有 • in Fig 3­15, when JMP [2] is executed, – current IP=0002, CS=1000H, – destination jump address is: IP+disp=0002+2=0004, CS does not change, so physical address=10004H 3.2.3 Indirect Program Memory Addressing • Intra­segment indirect jmp or call, CS does not change. – e.g. register’s value isdest. IP: JMP AX; JMP ECX; – memory’s value is dest. IP: JMP NEAR PTR table[BX]; • Inter­segment indirect jmp or call, CS change. – e.g. two word for IP and CS: JMP DWORD PTR table[BX] 3.3 Stack Memory­addressing Modes 3.3 Stack Memory­addressing Modes • Two stack­relative registers: SP (or ESP ), SS • CALL and RET instruction use stack to save or get return address. • SP always points to the effective data at stack top, not the free unit. • PUSH SRC ; e.g. PUSH DS – SP← SP : 2 – ( SP+1 : SP)← SRC • POP DST ; e.g. POP BP – DST ← : SP+1 : SP : – SP ← SP ? 2 • ax=3344h • before push ax 1022h 1020h 1122h <­­sp=1020h sp=1020H • ­­­­­­­­­­­­­­­­­­­­­­­­­­­­­­­­­­­­­­­­­­­­­­­­­­­­­­­­­­­­­­­­­­­­­­­­­ • after push ax upper address sp=1018H 1022h 1122h 1020h 3344h :::::: 1018h • :::::::::::::::::::::::: push :::::::::: – :::::::::::::::::::::::::::: push :::::::::: <­­sp=1018h lower address ...
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