LOGIC13_r2

# LOGIC13_r2 - Chapter 13 Analysis of Clocked Sequential...

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Chapter 13 Analysis of Clocked Sequential Networks

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When binary data is transmitted or stored, an extra bit a parity bit is frequently added for purposes of error detection. Odd( Even) parity The number of 1’s in a binary data is odd( Even), then the parity bit is set to “ 0 ” (“ 1 ”). The number of 1’s in a binary data is even (odd), then the parity bit is set to “ 1 ” (“ 0 ”). Therefore, the total number of is in a binary data (including original data and parity bit) will always be odd( Even). § A Sequential Parity Checker （（（（（（（
Ex Odd parity Even parity parity 0000000 1 0000001 0 0110110 1 parity 0000000 0 0000001 1 0110110 0

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Remark Parity checker can only check odd number of bit error. Block diagram for parity checker
The output of the network should be Z 1 if the total number of 1 inputs received is odd; that is, the output should be 1 if the input parity is odd. The output of Z 0 indicates that an error in transmission has occurred. The waveforms for parity checker.

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State graph State indication S 0 Z 0 Even number of 1’s received S 1 Z 1 Odd number of 1’s received
T must be 1 whenever Q and Q + differ. State graph in tabular form Next State Prese nt State X=0 X=1 Present Output S 0 S 0 S 1 0 S 1 S 1 S 0 1 Q + T Q X =0 X =1 X =0 X =1 Z 0 0 1 0 1 0 1 1 0 0 1 1

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so, the network when X 1, the FF changes state after the falling edge of the clock pulse. The final Z 0 since an even number of 1’s was received. Of the number of 1’s received had bean odd, the final value of Z 1. In this case, it would be necessary to reset the FF to the proper initial state Q 0 before checking the parity of another input sequence.
§ Analysis by signal tracing and timing charts

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## This note was uploaded on 10/23/2011 for the course EE 101 taught by Professor Wang during the Spring '11 term at Illinois State.

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LOGIC13_r2 - Chapter 13 Analysis of Clocked Sequential...

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