Homework2

# Homework2 - propagation delays for each of the six...

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Homework 2 Due 4/21/10 ECE 165, Prof. Buckwalter 1 Problem 1. NAND and NOR gate design . A) Assume the NMOS width is twice the minimum size device. Draw an equivalent circuit for the NAND and NOR with appropriate resistances and capacitances. (5) B) For the NAND gate, draw equivalent circuits and calculate the propagation delay for each of the six transition conditions listed in the table below. Modify the circuit in A) for each of the six conditions. Assume t po = 16ps. (20) C) For the NOR gate, draw equivalent circuits and calculate the
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Unformatted text preview: propagation delays for each of the six transition conditions listed in the table below. (20) Table 1: Calculated Performance Summary NAND Condition t pHL t pLH NOR Condition t pHL t pLH A = B = 0 to 1 X A = B = 0 to 1 X A = 1, B = 0 to 1 X A = 0, B = 0 to 1 X A = 0 to 1, B = 1 X A = 0 to 1, B = 0 X A = B = 1 to 0 X A = B = 1 to 0 X A = 1, B = 1 to 0 X A = 0, B = 1 to 0 X A = 1 to 0, B = 1 X A = 1 to 0, B = 0 X...
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