Homework 4 Due 5/21/10ECE 165, Prof. Buckwalter 1Problem 1. Full Adders. (60) One important building block of arithmetic logic is the full adder.You will need to analyze this circuit carefully as it is a critical block. The full adder takes threeinputs, A, B, and carry in, and computes two outputs, S and carry out.A) Consider implementing the full adder using simple combinational gates with fan-in of two/three. Draw a circuit (logic) schematic for the two functions above. (5)B) Calculate the minimum delay from Cito Coif F = 1. (7)C) Calculate the minimum delay from Cito S if F = 10. Which is slower? (8)D) The carry circuit is particularly important to speed. A fast carry circuit is shown below. Deter-
This is the end of the preview. Sign up
access the rest of the document.
This note was uploaded on 10/24/2011 for the course ECON 165 taught by Professor Berman,e during the Spring '08 term at UCSD.