Midterm_solution_Actual

# Midterm_solution_Actual - 1 ECE 165 Midterm Name: PID: SHOW...

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1 ECE165, Prof. Buckwalter ECE 165 Midterm Name: PID: SHOW ALL WORK. NO CREDIT UNLESS JUSTIFIED. Total 110 Points Maybe you know how to solve the problem and maybe you don’t; to maximize your score, go through the entire test and write down the equations needed to solve each problem first and then return to provide numerical answers. You will be graded for both!

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2 ECE165, Prof. Buckwalter Problem 1 Estimating device parameters (30pts). You are asked to determine the speed of a digital circuit in a new technology. You start by estimating the capacitances of the minimum size device. The minimum transistor geometry is W = 500nm, L = 100nm, and the source/drain gate overlap is x d = 50nm. Assume the gate oxide capacitance is 2 100 ox fF C m , the sidewall junction capacitance is , 2 jsw fF C m , and the bottom plate junction capacitance is 2 10 j fF C m . Approximate the lateral dimension of the drain and source diffusion is S LL . Assume a minimum size device in all problems unless otherwise stated. a) Calculate the drain bulk capacitance. (4)  2 2 10 0.05 2 0.7 1.9 db J JSW fF fF CC A C P m m f F mm   Assuming Keq and Keqsw = 1 2 points for general equation, 2 points for correct result b) Calculate the gate drain capacitance. (4) 2 100 0.05 0.5 2.5 gd gs ox d fF CCC x W m m f F m  2 points for general equation, 2 points for correct result c) Calculate “intrinsic” capacitance for a FET in an inverter. (4) int 2 2 2.5 1.9 6.9 gd db C f F f F f F 2 points for equation, 1 point for correct result Acceptable: int 2.5 1.9 4.4 gd db f F f F f F  Also acceptable: Assumption of 2:1 ratio for inverter and calculating Cint int 32 20 .7 gd db C f F 2 points for general equation, 2 points for correct result
3 ECE165, Prof. Buckwalter d) Find the minimum average propagation delay for the inverter and the best ratio of PFET to NFET width for symmetric switching. (4 pts)  int, int,, int, 0.69 0.69 where 0.69 1 0.69 1 eqn eqp pHL total pLH total total n p np p n pHL eqn pLH eqp RR tC C C W W WW W W tR C C      1 0.35 1 1 2 p n pp L H p H L e q n e q p W W tt t C R R  2 00 p eqn eqp n p eqp pn p n e q n dt R R W W R dW W W W R    0.35 2 p eqn eqp eqn eqp R R R R 1 point for each prop delay, 1 points for differentiation, 1 point for each correct answer. e) You might need a tri state buffer for your project and it is probably worth considering the delay through this stage. First, find the LH and HL propagation times in terms of Reqp, Reqn, and C where each term is a resistance or capacitance of a minimum size NFET or PFET. Next, find the average propagation time in terms of the tpo of an inverter. Assume Wp/Wn = 2. (10 pts)

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4 ECE165, Prof. Buckwalter
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## This note was uploaded on 10/24/2011 for the course ECON 165 taught by Professor Berman,e during the Spring '08 term at UCSD.

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Midterm_solution_Actual - 1 ECE 165 Midterm Name: PID: SHOW...

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