02ece108HWset2withsolutions2011

02ece108HWset2withsolutions2011 - voltage values on the...

Info iconThis preview shows pages 1–5. Sign up to view the full content.

View Full Document Right Arrow Icon
HW set 2 Esener ece108 Problem #1 Problem #2 1 Problem #3
Background image of page 1

Info iconThis preview has intentionally blurred sections. Sign up to view the full version.

View Full DocumentRight Arrow Icon
Problem #5 Show that the parallel connection of MOSFETs shown below behaves as a single MOSFET with a width equal to the sum onf the individual MOSFET widths
Background image of page 2
Problem #5
Background image of page 3

Info iconThis preview has intentionally blurred sections. Sign up to view the full version.

View Full DocumentRight Arrow Icon
Problem #7 A hypothetical two terminal device with IV characteristics as shown in figure 1a is considered for use as a pull up device for an inverter. The device is not affected by body effect and occupies the same size as a comparable PMOS device and can be integrated with NMOS devices on the same substrate. The inverter pull down is a conventional NMOS transistor with a threshold voltage of 0.5V . Draw the load line associated with this pull-up on the output characteristics in figure 1b. Plot the voltage transfer characteristics of such an inverter by carefully showing critical
Background image of page 4
Background image of page 5
This is the end of the preview. Sign up to access the rest of the document.

Unformatted text preview: voltage values on the plot. Determine the input voltage for which the transfer characteristics have maximum slope (sharpest transition). What is the maximum output high and minimum output low voltage that this inverter can exhibit? What is the output dynamic range? Is this a ratioed or ratioless inverter? What is the peak current that can flow in the circuit? Discuss qualitatively the performance of this logic capability with that of CMOS logic when driving similar load capacitance in terms of area consumed noise margins power dissipation Explain your answers. Problem #8 Depletion mode inverter design...
View Full Document

This note was uploaded on 10/24/2011 for the course ECE 108 taught by Professor Kennethy.yun during the Spring '08 term at UCSD.

Page1 / 5

02ece108HWset2withsolutions2011 - voltage values on the...

This preview shows document pages 1 - 5. Sign up to view the full document.

View Full Document Right Arrow Icon
Ask a homework question - tutors are online