ECE 206 - Write-up Lab 9 - Transistor-Transistor Logic...

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Transistor-Transistor Logic (TTL) Experiment #9 ECE 206 Experiment #9 Transistor-Transistor Logic (TTL) by Mauro Rodriguez TA: Johnson Liu Section: F6 Bench Number 4 ECE 206 Mauro Rodriguez
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Transistor-Transistor Logic (TTL) Experiment #9 Question 1: On one graph, plot 0 A V , 0 B V , and 1 o V as a function of in V , from your data in step 2. Plotting 0 A V , 0 B V , and 1 o V as a function of in V . V A0 , V B0 , and V o1 vs. V in 0 1 2 3 4 5 6 0 0.5 1 1.5 2 2.5 3 3.5 V in [Volts] V out [Volts] Vo1 Vbo Vao Saturation Mode for T 1 Reverse Active Mode for T 1 Cutoff Mode for T 2 Saturated Mode for T 2 Forward-active for T Question 2: On this same graph, indicate the “regions” where 1 T is a) saturated b) reverse active Question 3: On this same graph, indicated the “regions” where 2 T is a) off b) forward active c) saturated Answering both Question 2 and 3 at once: The transistors 1 T and 2 T regions of operation were determined by analyzing both the circuit and the displayed plot. For 1 T , the saturated region exists when the input voltage is less than 0.5 Volts and it is at this region that the base current for 2 T runs in the opposite direction making the transistor be cut-off. Once the input voltage exceeds 0.5 Volts,
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ECE 206 - Write-up Lab 9 - Transistor-Transistor Logic...

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