Unformatted text preview: output, including the inverter risetime and fall time on Monday, Nov. 8th. Submit the inverter layout to the TA of EEL5322 by 5 pm on Friday Nov. 9th via the Homework link on WebCT. Be sure to do a DRC and LVS the circuit layout. Rabaey, p. 198 and color plate 6 shows the basic layout of an inverter. PMOS W = 1.125 um, L =0.25 um NMOS W = 0.500 um, L= 0.25 um...
View Full Document
This note was uploaded on 10/24/2011 for the course EEE 5322 taught by Professor W.r.eisenstadt during the Fall '10 term at University of Florida.
- Fall '10